LY62102516 Datasheet, PDF (9/13 Pages) Lyontek Inc. – 1024K X 16 BIT LOW POWER CMOS SRAM

®
Rev. 0.3
LY62102516
1024K X 16 BIT LOW POWER CMOS SRAM
DATA RETENTION CHARACTERISTICS
PARAMETER SYMBOL
TEST CONDITION
VCC for Data Retention VDR CE#≧VCC - 0.2V or CE2≦0.2V
Data Retention Current
VCC = 1.5V
-LL
IDR CE# ≧VCC-0.2V or CE2≦0.2V -LLE
other pins at 0.2V or VCC-0.2V _-LLI
Chip Disable to Data
Retention Time
tCDR
See Data Retention
Waveforms (below)
Recovery Time
tR
tRC_* = Read Cycle Time
DATA RETENTION WAVEFORM
Low Vcc Data Retention Waveform (1) (CE# controlled)
MIN.
1.5
-
-
-
0
tRC_*
TYP.
-
8
8
8
-
-
MAX.
5.5
50
60
80
UNIT
V
µA
µA
µA
-
ns
-
ns
Vcc
CE#
Vcc(min.)
tCDR
VIH
VDR ≧ 1.5V
CE# ≧ Vcc-0.2V
Vcc(min.)
tR
VIH
Low Vcc Data Retention Waveform (2) (CE2 controlled)
Vcc
CE2
Vcc(min.)
tCDR
VIL
VDR ≧ 1.5V
CE2 ≦ 0.2V
Low Vcc Data Retention Waveform (3) (LB#, UB# controlled)
Vcc
LB#,UB#
Vcc(min.)
tCDR
VIH
VDR ≧ 1.5V
LB#,UB# ≧ Vcc-0.2V
Vcc(min.)
tR
VIL
Vcc(min.)
tR
VIH
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: [phone]
FAX: [phone]
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