LY62W1024_12 Datasheet, PDF (1/16 Pages) Lyontek Inc. – 128K X 8 BIT LOW POWER CMOS SRAM

®
Rev. 1.8
LY62W1024
128K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 1.3
Rev. 1.4
Rev. 1.5
Rev. 1.6
Rev. 1.7
Rev. 1.8
Description
Initial Issue
Revised ISB1 LL/LLI-LLE(max)= 50/100 μA => 20/50 μA
IDR LL/LLI-LLE(max)= 20/40 μA => 12/30 μA
Added SL Spec.
Revised typos in FEATURES
Revised I_SB1/I_DR(MAX.)
Added I_SB1/I_DR values when T_A = 25℃ and T_A = 40℃
Revised FEATURES & ORDERING INFORMATION
Lead free and green package available to Green package available
Added packing type in ORDERING INFORMATION
Revised VTERM to VT1 and VT2
Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS
Revised PACKAGE OUTLINE DIMENSION in page 10/11/12/13
Revised ORDERING INFORMATION in page 14
Deleted E Grade
Revised PIN CONFIGURATION in page 2
Issue Date
Aug.28.2005
Mar.30.2006
Nov.2.2007
May.6.2008
Mar.30.2009
May.7.2010
Aug.30.2010
Aug.9.2011
Apr.06.2012
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: [phone]
FAX: [phone]
0