LY62L12916_13 Datasheet, PDF (1/17 Pages) Lyontek Inc. – 128K X 16 BIT LOW POWER CMOS SRAM

®
Rev. 1.0
LY62L12916
128K X 16 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 0.1
Rev. 0.2
Rev. 0.3
Rev. 0.4
Rev. 0.5
Rev. 0.6
Rev. 1.0
Description
Initial Issue
Revised Package Outline Dimension(TSOP-II)
Revised FEATURES & ORDERING INFORMATION
Lead free and green package available to Green package
available
Added packing type in ORDERING INFORMATION
Revised VTERM to VT1 and VT2
Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS
Revised Test Condition of ISB1/IDR
Added I_SB1/I_DR values when T_A = 25℃ and T_A = 40℃
Added SL grade
Deleted L grade
Revised PACKAGE OUTLINE DIMENSION in page 12
Revised ORDERING INFORMATION in page 13
Revised Notes item 1 and 2 in page 4
1. VIH(max) = VCC + 2.0V for pulse width less than 6ns.
2. VIL(min) = VSS - 2.0V for pulse width less than 6ns.
Revised ORDERING INFORMATION
Issue Date
May.20.2005
Apr.12.2007
Apr.17.2009
Jun.15.2009
May.6.2010
Aug.30.2010
Aug.29.2013
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: [phone]
FAX: [phone]
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