LY61L5128A_13 Datasheet, PDF (1/11 Pages) Lyontek Inc. – 512K X 8 BIT HIGH SPEED CMOS SRAM

®
Rev. 1.4
LY61L5128A
512K X 8 BIT HIGH SPEED CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev.1.2
Rev.1.3
Rev.1.4
Description
Issue Date
Initial Issue
July.12. 2012
.“CE# ≧VCC - 0.2V” revised as ”CE# ≦0.2” for TEST
CONDITION of Average Operating Power supply Current
Icc1 on page3
July.19. 2012
Add “Green package available” on page 1
Nov. 02. 2012
1.Revise “TEST CONDITION” for VOH, VOL on page 3
IOH = -8mA revised as -4mA
IOL =4mA revised as 8mA
2.Revise VIH(max) & VIL(min) note on page 3
VIH(max) = VCC + 2.0V for pulse width less than 6ns.
VIL(min) = VSS - 2.0V for pulse width less than 6ns.
June. 04. 2013
Revised the address pin sequence of TSOP-II pin configuration
on page 3 in order to be compatible with industry convention.
(No function specifications and applications have been changed
and all the characteristics are kept all the same as Rev 1.3 )
Oct. 30. 2013
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: [phone]
FAX: [phone]
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