BL652-SA Datasheet, PDF (49/69 Pages) Laird Tech Smart Technology – Input with active low logic. Internal pull down

BL652
Datasheet
pin (in your smart BASIC application script) if that particular pin is wired to a device that expects to be driven
by the BL652 SIO pin configured as an output. Also, these SIO pins have the internal pull-up or pull-down
resistor-enabled by default in firmware (see Pin Definitions Table 2). This was done to avoid floating inputs,
which can cause current consumption in low power modes (e.g. StandbyDoze) to drift with time. You can
disable the PULL-UP or Pull-down through their smartBASIC application.
Note: Internal pull-up, pull down will take current from VCC.
 SIO_02 pin and OTA smartBASIC application download feature
SIO_02 is an input, set with internal pull-down (in FW). Refer to latest firmware release documentation on
how SIO_02 is used for Over the Air smartBASIC application download feature. SIO_02 pin has to be pulled
high externally to enable the feature. Decide if this feature is required in production. When SIO_02 is high,
ensure nAutoRun is NOT high at same time; otherwise you cannot load the smartBASIC application script.
 NFC antenna connector
To make use of the Laird flexi-PCB NFC antenna, fit connector:
Description: FFC/FPC Connector, Right Angle, SMD/90d,Dual Contact,1.2mm Mated Height
Manufacturer: Molex
Manufacturers Part number: 512810594
Add tuning capacitors of 300 pF on NGC1 pin to GND and 300 pF on NFC2 pins to GND if the PCB track length
is similar as DVK-BL652 devboard.
 nRESET pin (active low)
Hardware reset. Wire out to push button or drive by host.
By default module is out of reset when power applied to VCC pins.
 Optional External 32.768kHz crystal
If the optional external 32.768kHz crystal is needed then use a crystal that meets specification.
 Optional External serial SPI flash IC
If the optional external serial (SPI) flash is required, ensure that manufacturer part number tested by Laird
are used.
PCB Layout on Host PCB - General
Checklist (for PCB):
 MUST locate BL652-Sx module close to the edge of PCB (mandatory for BL652-SA for on-board chip antenna
to radiate properly).
 Use solid GND plane on inner layer (for best EMC and RF performance).
 All module GND pins MUST be connected to host PCB GND.
 Place GND vias close to module GND pads as possible.
 Unused PCB area on surface layer can flooded with copper but place GND vias regularly to connect copper
flood to inner GND plane. If GND flood copper underside the module then connect with GND vias to inner
GND plane.
 Route traces to avoid noise being picked up on VCC supply and AIN (analogue) and SIO (digital) traces.
 Ensure no exposed copper is on the underside of the module (refer to land pattern of BL652 development
board).
Embedded Wireless Solutions Support Center:
http://ews-support.lairdtech.com
www.lairdtech.com/bluetooth
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