YGV619 Datasheet, PDF (10/15 Pages) LSI Computer Systems – Advanced Video Display Processor 6

YGV619
< PLL >
l DCKIN (I), DCKOUT (O)
XTAL connection pins for generating dot clock. The dot clock is used by sync control, display control and screen
composition blocks. By using the built-in PLL, dot clock with various frequencies that synchronizes with the clock of
DCKIN pin can be generated. When SYCKS pin is brought to high level, system clock is generated together with dot
clock from input clock of DCKIN pin.
Dot clock can be generated from input clock of DCKIN pin in accordance with the setting of the built-in registers,
however, it is necessary to input some clock to DCKIN pin. (DCKIN pin is used to input initialization clock.)
l SYCKIN (I), SYCKOUT (O)
XTAL connection pins for generating system clock. This clock is supplied to SDRAM interface, CPU interface,
drawing processor, and video capture blocks individually. When making SYCKS pin open or high level, input a fixed
signal to SYCKIN pin. SYCKOUT pin can be left open.
Externally oscillated clock, if used, should be inputted to SYCKIN.
< Power supply >
l AVDD1 (I), AVSS1 (I)
Supplies power to PLL (PLLDCK) for dot clock. Connect 3.3 V to AVDD1 and GND level to AVSS1.
When designing the circuit board, take care so that the noise from the lines that supply power to other power supply
pins of AVDP6 does not enter these pins.
l AVDD2 (I), AVSS2 (I)
These pins supply power to PLL (PLLVCK) for system clock. Connect 3.3 V to AVDD2 and GND level to AVSS2.
When designing the circuit board, take care so that the noise from the lines that supply power to other power supply pins
of AVDP6 does not enter these pins.
l AVDD3 (I), AVSS3 (I)
Use these pins to supply power to the digital circuit of the build-in 8 bit DAC. Connect 3.3 V to AVDD3 and GND
level to AVSS3. When designing the circuit board, take care so that the noise from the lines that supply power to other
power supply pins of AVDP6 does not enter these pins.
l AVDD4 (I), AVSS4 (I)
Use these pins to supply power to the analog circuit of the build-in 8 bit DAC. Connect 3.3 V to AVDD4 and GND
level to AVSS4. When designing the circuit board, take care so that the noise from the lines that supply power to other
power supply pins of AVDP6 does not enter these pins.
l VDD (I), VSS (I)
These pins supply power to digital circuits and I/O section. Connect 3.3 V to VDD and GND level to VSS. When
designing the circuit board, take care so that the noise from the lines that supply power to other power supply pins of
AVDP6 does not enter these pins.
< Others >
l TEST2-0, TCKS, TCK80 (I)
Input pins for testing. Input high level signal for regular operations of the device.
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