LS7560N_12 Datasheet, PDF (1/8 Pages) LSI Computer Systems – BRUSHLESS DC MOTOR CONTROLLER

LSI/CSI
LS7560N
LS7561N
U_{® L LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 [phone] FAX [phone]}
A3800
BRUSHLESS DC MOTOR CONTROLLER
April 2012
FEATURES
• Open loop motor control
• Tachometer output for closed loop motor control
• Error Amplifier and PWM Speed Comparator with full accessibility
• High noise immunity Schmitt Triggers on Sensor inputs
• 5.5V Reference Supply for external sensors
• Cycle-by-cycle current sensing
• Static, or current limited dynamic, motor braking
• Output enable delay on speed direction reversal
• Enable input with fault sensing capability
• Fault Indicator output
• 60°/300° or 120°/240° electrical sensor spacing selection
• Selectable PWM of top and bottom drivers or bottom drivers only
• CMOS compatible motor outputs with drive capability
• Selectable top driver polarity
• Low power dissipation
• +10V to +18V Power Supply (VDD - VSS)
• LS7560N, LS7561N (DIP); LS7560N-S, LS7561N-S (SOIC);
LS7560N-TS, LS7561N-TS (TSSOP) - See Figure 1 -
• Note: LS7560N/LS7561N are backward compatible with LS7560/LS7561
FIGURE 1. PIN CONNECTION DIAGRAM
TOP VIEW
SEQUENCE SELECT 1
ENABLE 2
FAULT INDICATOR 3
RC 4
TACHOMETER OUT 5
ERROR AMP (+) 6
28 _{V DD (+V)}
27 ^F/R
26 S3
25 S2
24 S1
HALL
SENSORS
23 BRAKE
ERROR AMP (-) 7
ERROR AMP OUT 8
OSCILLATOR 9
CURRENT SENSE (+) 10
22 ^{BRAKE SELECT}
21 PWM CONTROL
20 _{TOP DRIVER POLARITY SELECT}
19 V R
CURRENT SENSE (-) 11
OUT 6 12
OUT 5 13
18 V SS (-V)
17 OUT 1
16 OUT 2
GENERAL DESCRIPTION
The LS7560N/LS7561N are designed to control three or four
phase brushless DC motors in a closed or open loop con-
figuration. The IC consists of a decoder which provides proper
commutation sequencing, a frequency-to-pulse width convert-
er and error amplifier for closed loop motor speed control, a
PWM comparator and sawtooth oscillator for external driver
power control and a 6V reference generator for supplying pow-
er to motor sensors. Also included is Fault detection and in-
dication, overcurrent sensing, dynamic motor braking, forward/
reverse input, sensor spacing selections and an enable input
control. The overcurrent sense condition will disable all output
drivers when using the LS7560N and only the bottom drivers
when using the LS7561N.
The IC operates from 10V to 18V and provides CMOS com-
patible outputs for interfacing with external power devices.
Operating below 10V will activate a Fault Indication Output
and disable all Output Drivers.
INPUT/OUTPUT DESCRIPTION: (See Figure 2)
OUT 4 14
15 ^{OUT 3}
S1, S2, S3 Inputs (Pins 24, 25, 26)
Hall Sensor inputs which are decoded to determine the Motor
Commutation Sequence. An invalid input code disables all motor
outputs. Inputs have Schmitt Trigger buffers for noise immunity.
BRAKE Input (Pin 23)
With the Brake Select input Low, a High on the Brake input forces
the Top Drivers to an Off condition and the Bottom Drivers to a
PWM On condition. If the Motor is under Closed Loop control, the
Loop must be opened and the error amplifier output connected to
the Error Amp (-) input. By controlling the voltage at the Error Amp
(+) input, the PWM duty cycle is controlled during braking (see Fig-
ure 8). This manner of braking prevents the Bottom Motor Drivers
from drawing excessive current, a condition which can occur during
normal braking, when the Bottom Drivers are turned ON un-
conditionally. With the Brake Select input High, a High on the
Brake input unconditionally causes the Top Drivers to turn Off and
the Bottom Drivers to turn On. The Brake function has priority over
all other functions.
SEQUENCE SELECT Input (Pin 1 )
A High on this input selects 60°/300° and a Low selects
120°/240° electrical sensor separation. Use of a 300° or 240°
motor will cause opposite direction rotation as compared to a
60° or 120° motor.
F/R Input (Pin 27)
A High on this input selects Forward direction and a Low se-
lects Reverse direction. The motor drive outputs are disabled
for 2 clock cycles at the onset of a direction change.
BRAKE SELECT Input (Pin 22)
A Low on this input selects PWM control of braking and a High se-
lects unconditional braking.
ENABLE Input (Pin 2)
When the Enable input is above VR/2, all Output Drivers are en-
abled and when it is below VR/2.2, all Output Drivers are disabled.
This input has a nominal hysteresis of 0.05VR, where VR is the in-
ternally generated Reference Voltage available on Pin 19. Because
the Enable input is level sensitive, it can easily be used to control
operation of the IC based on an Analog Fault Condition.
7560N-042512-1