LS7272 Datasheet, PDF (1/6 Pages) LSI Computer Systems – 30 VOLT QUAD-CHANNEL DIFFERENTIAL LINE DRIVER

LS7272 LS7272-20
LS7273 LS7273-20
30 VOLT QUAD-CHANNEL DIFFERENTIAL LINE DRIVER
Nov 2012
PIN ASSIGNMENT – TOP VIEW
FEATURES:
• More feature-rich and cost-effective than the OL7272 and ET7273
• Pin to pin replaceable with the OL7272 and functionally equivalent to the ET7273
• Push-Pull or Open-Drain output drivers (LS7272)
• Open-Drain output drivers only (LS7273)
• Voltage Range: 4.5V – 30V (VDD – VSS)
• 120mA Sink/Source output drive
• Operating frequency up to 4 MHz
• Thermal shutdown protection for output driver overload
• Enable input with Thermal Shutdown disconnect feature
• 1.5A dynamic peak output current drive
• Outputs RS422A compatible
• Inputs CMOS/TTL compatible with hysteresis
• Output drivers fully connected or high-impedance state
PART NUMBER ORDERING INFORMATION:
This part is available in three package styles, DIP, SOIC, and TSSOP.
For DIP packages: LS7272, LS7273, LS7272-20, LS7273-20
For SOIC packages: LS7272-S, LS7273-S, LS7272-S20, LS7273-S20
For TSSOP packages: LS7272-TS, LS7273-TS, LS7272TS20, LS7273TS20
DESCRIPTION:
The LS7272/LS7273 are short-circuit proof Quad Differential Industrial Power Line Drivers. They
can operate up to 30V and have a selectable thermal shutdown features.
The Data inputs are TTL / CMOS compatible and can also be driven up to the supply voltage VDD.
The ENA input can be used to place all the outputs in a high impedance state. For the LS7272
the OPD input is used to connect the outputs as push-pull drivers or open-drain drivers, where
the outputs can be returned through external loads to a maximum voltage of VDD.
For the LS7273, pin4 is LOW and is tied to ground. The outputs are open drain and the loads can
be returned to any voltage between 4.5V and 30V independent of VDD.
An internal 5V regulated supply is used to power the logic and level converter blocks.
The thermal shutdown block located in the center of the IC can be disabled by setting the ENA
input, Pin 12, to a voltage between 7.5V and 12V.
Upon power-up, a Power-On-Reset (POR) circuit block forces all output drivers to the high-
impedance state until the power supply voltage reaches a nominal 3.8V. Included in the POR
circuit block is a hysteresis of 100mV such that if the power supply drops below 3.7V all output
drivers are forced to the high-impedance state until the voltage rises above 3.8V. There is a built-
in 5μs delay for disabling the output drivers should the power supply drop below 3.7V. The output
drivers are immediately enabled when the voltage rises above 3.8V.
7272-112912-1
A1
16 VDD
AO ²
15 _D
AO 3
14 DO
OPD 4
13 DO
BO 5
12 ENA
BO 6
11 CO
B7
10 CO
VSS 8
9C
FIGURE 1
A1
AO 2
AO 3
LOW 4
BO 5
BO 6
B7
VSS 8
16 VDD
15 D
14 DO
13 DO
12 ENA
11 CO
10 CO
9C
FIGURE 2