LS7260_15 Datasheet, PDF (1/7 Pages) LSI Computer Systems – BRUSHLESS DC MOTOR COMMUTATOR / CONTROLLER

LS7260
LS7262
BRUSHLESS DC MOTOR COMMUTATOR / CONTROLLER
FEATURES:
Nov 2015
PIN ASSIGNMENT – TOP VIEW
Direct drive of P-Channel and N-Channel FETs (LS7260)
Direct drive of PNP and NPN transistors (LS7262)
Six outputs drive power switching bridge directly
Open or closed loop motor speed control
+5V to +28V operation (VSS – VDD)
Externally selectable input to output code for 60°,
120°, 240°, or 300° electrical sensor spacing
Three or four phase operation
Analog speed control
Direction control
Output enable control
Positive static braking
Over-current sensing
LS7260, LS7262 (DIP); LS7260-S, LS7262-S (SOIC);
LS7260-TS, LS7262-TS (TSSOP) – See Connection Diagram.
DESCRIPTION:
The LS7260 / LS7262 are MOS integrated circuits designed to
generate the signals necessary to control a three phase or four
phase brushless DC motor. They are the basic building blocks of a
brushless DC motor controller. The circuits respond to changes at
the SENSE inputs, originating at the motor position sensors, to
provide electronic commutation of the motor windings. Pulse width
modulation of outputs for motor speed control is accomplished
through either the ENABLE input or through the analog input
(VTRIP) in conjunction with the OSCILLATOR input. Over-current
circuitry is provided to protect the windings, associated drivers, and
power supply. The over-current circuitry causes the external output
drivers to switch off immediately upon sensing the over-current
condition and on again only when the over-current condition
disappears and the positive edge of either the ENABLE input or the
saw-tooth OSCILLATOR occurs. This limits the over-current sense
cycling to the chopping rate of the ENABLE input or the saw-tooth
OSCILLATOR.
A positive braking feature is provided to effect rapid deceleration.
While the LS7262 is designed for driving PNP and NPN transistors
(See Fig. 2.), the LS7260 is designed to drive both PMOS and
NMOS Power FETs and develops a full 12V drive for both the N-
Channel and P-Channel devices (See Fig. 1) when using a 12V
power supply.
INPUT / OUTPUT DESCRIPTION:
COMMUTATION SELECTS (Pins 1, 20)
These inputs are used to select the proper sequence of outputs
based on the electrical separation of the motor position sensors.
See Table 3. Note that in all cases the external output drivers are
disabled for invalid SENSE input codes. Internal pull down resistors
are provided at Pins 1 and 20 causing a logic zero when these pins
are left open.
FORWARD / REVERSE (Pins 19)
These inputs are used to select the proper sequence of outputs for
the desired direction of rotation for the Motor (See Table 3). An
internal pull-up resistor holds the input high when left open.
SENSE INPUTS (Pins 15, 16, 17)
These inputs provide control of the output commutation sequence
as shown in Table 3. S1, S2, S3 originate in the position sensors of
the motor and must sequence in cycle code order. Hall-switch pull-
up resistors are provided at Pins 15, 16 and 17. The positive supply
of the Hall devices should be common to the chip VSS.
BRAKE (Pin 9)
For the LS7262 and LS7362, a high level at this input
unconditionally turns off outputs 1, 2 and 3 and turns on outputs 4, 5
and 6 (See Figures 2 and 4.) For the LS7260, a high level at this
input turns on outputs 1, 2 and 3 and outputs 4, 5 and 6 (See Fig.
1). In both cases, transistors Q101, Q102 and Q103 cut off and
transistors Q104, Q105 and Q106 turn on, shorting the windings
together. The BRAKE has priority over all other inputs.
7260-110515-1