LMUN5211T1 Datasheet, PDF (1/10 Pages) Leshan Radio Company – Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network

LESHAN RADIO COMPANY, LTD.
Bias Resistor Transistor
NPN Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network con-
sisting of two resistors; a series base resistor and a base–emitter resistor.
The BRT eliminates these individual components by integrating them into a
single device. The use of a BRT can reduce both system cost and board
space. The device is housed in the SC–70/SOT–323 package which is
designed for low power surface mount applications.
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• The SC–70/SOT–323 package can be soldered using wave or
reflow. The modified gull–winged leads absorb thermal stress
during soldering eliminating the possibility of damage to the die.
• Available in 8 mm embossed tape and reel
Use the Device Number to order the 7 inch/3000 unit reel.
• Pb-Free package is available
DEVICE MARKING INFORMATION
See specific marking information in the device marking table on page 2
of this data sheet.
MAXIMUM RATINGS (T_A = 25°C unless otherwise noted)
Rating
Symbol
Value
Collector-Base Voltage
V_CBO
50
Collector-Emitter Voltage
V_CEO
50
Collector Current
I_C
100
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Total Device Dissipation
T_A = 25°C
Derate above 25°C
P_D
202 (Note 1.)
310 (Note 2.)
1.6 (Note 1.)
2.5 (Note 2.)
Thermal Resistance –
Junction-to-Ambient
R_θJA
618 (Note 1.)
403 (Note 2.)
Thermal Resistance –
Junction-to-Lead
R_θJL
280 (Note 1.)
332 (Note 2.)
Junction and Storage
Temperature Range
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
T_J, T_stg
–55 to +150
Unit
Vdc
Vdc
mAdc
Unit
mW
mW/°C
°C/W
°C/W
°C
LMUN5211T1
SERIES
3
1
2
SC-70 / SOT-323
PIN 1
R₁
BASE
(INPUT)
R₂
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
MARKING DIAGRAM
8X M
8x = Specific Device Code
x = (See Marking Table)
M= Date Code
LMUN5211T1 Series–1/10