LF2301 Datasheet, PDF (11/18 Pages) LOGIC Devices Incorporated – Image Resampling Sequencer

DEVICES INCORPORATED
LF2301
Image Resampling Sequencer
Pass 1 of Two-Pass Operation
Pass 1 of the two-pass operation
performs horizontal filtering on an
image as shown in Figure 9. This
mode is selected by loading M1-0 with
“01.” In this example, a horizontal
filter with a kernel size of 3 pixels is
desired. Loading K3-0 with “0010”
selects a kernel size of 3. The first
pixel selected is determined by x0 and
y0. In this example, the first pixel is
(0,0). In this case, the LF2301s should
address consecutive pixels during each
pixel walk. For this to occur, FOV must
be set to 1 (F2-0 loaded with “001”).
After the last pixel of a pixel walk has
been selected, the next pixel address is
determined by adding dx/du to the
current X address and by adding dy/
du to the current Y address (unless the
kernel just completed was the last for
that line). At the end of the first pixel
walk, pixel (2,0) is addressed. Since
the first pixel of the next pixel walk
should be (1,0), dx/du is selected to be
-1 and dy/du is selected to be 0. After
the last pixel of the last pixel walk on
the first line has been selected, the first
FIGURE 9. PASS 1 OF TWO-PASS
0
1
2
3
4
-1
1
2
3
0
4
5
6
1
7
2
3
1 = 1st pixel of 1st walk,
2 = 1st pixel of 2nd walk, etc.
pixel address of the second line is
determined by adding dx/dv to x0
and by adding dy/dv to y0. Since the
first pixel of the first pixel walk on the
second line should be (0,1), dx/dv is
selected to be 0 and dy/dv is selected
to be 1. Second order differential
terms are not used in this filter and are
therefore set to 0.
TABLE 9. PARAMETER REGISTERS
ADDR Row (HEX) Column (HEX)
0000
000
000
0001
FFF
FFF
0010
000
000
0011
040
140
0100
000
000
0101
1FF
000
0110
000
000
0111
200
201
1000
000
000
1001
000
000
1010
000
000
1011
000
000
1100
000
000
1101
000
000
1110
005
005
1111
006
006
UMIN and VMIN are both selected to
be 5. UMAX and VMAX are both
selected to be 6. Table 9 shows the
values loaded into all Parameter
Registers. Table 10 shows the ITS
outputs for the Pass 1 of a Two-Pass
operation.
TABLE 10. ITS OUTPUTS FOR PASS 1 OF TWO-PASS
Cycle
x
y
CAx (HEX) CAy (HEX)
u
1
0
0
00
2
0
0
00
3
0
0
00
00
x
00
x
00
x
4
0
0
00
5
1
0
01
6
2
0
02
00
x
01
x
02
x
7
1
0
00
8
2
0
01
9
3
0
02
00
5
01
5
02
5
10
2
0
00
11
3
0
01
12
4
0
02
00
6
01
6
02
6
13
0
1
00
14
1
1
01
15
2
1
02
00
7
01
7
02
7
16
1
1
00
17
2
1
01
18
3
1
02
00
5
01
5
02
5
19
2
1
00
20
3
1
01
21
4
1
02
00
6
01
6
02
6
22
0
0
00
23
1
0
01
24
2
0
02
00
7
01
7
02
7
v
INIT ACC UWRI ENDx ENDy DONE
x
1
0
1
0
0
0
x
0
0
1
0
0
0
x
0
0
1
0
0
0
x
0
0
1
0
0
0
x
0
1
0
1
0
0
x
0
1
1
1
0
0
5
0
0
1
1
0
0
5
0
1
0
0
0
0
5
0
1
1
0
0
0
5
0
0
1
0
0
0
5
0
1
0
0
1
0
5
0
1
1
0
1
0
5
0
0
1
0
1
0
5
0
1
0
1
1
0
5
0
1
1
1
1
0
6
0
0
1
1
1
0
6
0
1
0
0
1
0
6
0
1
1
0
1
0
6
0
0
1
0
1
0
6
0
1
0
0
0
1
6
0
1
1
0
0
1
6
0
0
1
0
0
1
6
0
1
0
1
0
1
6
0
1
1
1
0
1
Video Imaging Products
2-11
08/16/2000–LDS.2301-H