LMU08 Datasheet, PDF (1/7 Pages) LOGIC Devices Incorporated – 8 x 8-bit Parallel Multiplier

DEVICES INCORPORATED
DEVICES INCORPORATED
LMU08/8U
8 x 8-bi_Lt P_Mara_Ulle₀l M₈u_/l₈tip_Ulier
8 x 8-bit Parallel Multiplier
FEATURES
DESCRIPTION
u 20 ns Worst-Case Multiply Time
u Low Power CMOS Technology
u LMU08 Replaces TRW TMC208K
u LMU8U Replaces TRW TMC28KU
u Two’s Complement (LMU08), or
Unsigned Operands (LMU8U)
u Three-State Outputs
u Package Styles Available:
• 40-pin PDIP
• 44-pin PLCC, J-Lead
The LMU08 and LMU8U are high-
speed, low power 8-bit parallel
multipliers. They are pin-for-pin
equivalents with TRW TMC208K and
TMC28KU type multipliers. Full
military ambient temperature range
operation is attained by the use of
advanced CMOS technology.
Both the LMU08 and the LMU8U
produce the 16-bit product of two
8-bit numbers. The LMU08 accepts
operands in two’s complement format,
and produces a two’s complement
result. The product is provided in two
halves with the sign bit replicated as
the most significant bit of both halves.
LMU08/8U BLOCK DIAGRAM
CLK A
CLK B
A7-0
8
A REGISTER
B7-0
8
B REGISTER
This facilitates use of the LMU08
product as a double precision operand
in 8-bit systems. The LMU8U oper-
ates on unsigned data, producing an
unsigned magnitude result.
Both the LMU08 and the LMU8U
feature independently controlled
registers for both inputs and the
product, which along with three-state
outputs allows easy interfacing with
microprocessor busses. Provision is
made in the LMU08 and LMU8U for
proper rounding of the product to
8-bit precision. The round input is
loaded at the rising edge of the logical
OR of CLK A and CLK B for the
LMU08. The LMU8U latches RND on
the rising edge of CLK A only. In
either case, a ‘1’ is added in the most
significant position of the lower
product byte when RND is asserted.
Subsequent truncation of the least
significant product byte results in a
correctly rounded 8-bit result.
LMU08 Only
RND
CLK R
16
8
RESULT
8
REGISTER
OEM
8
R15-8
OEL
8
R7-0
1
Multipliers
08/16/2000–LDS.08/8U-R