ASDL-7021 Datasheet, PDF (1/23 Pages) Lite-On Technology Corporation – IrDA팜 FIR/VFIR Controller in TFBGA Package

ASDL-7021
IrDA FIR/VFIR Controller in TFBGA Package
Data Sheet
Description
The ASDL-7021 is a new generation large scale integra-
tion (LSI) IrDA controller supporting speeds of SIR (up
to 115Kbps), MIR(1.152Mbps), FIR(4Mbps) and VFIR
(16Mbps). It consists of IrDA Control Block, Remote
Control Block, Timer Control Block, Global Control block
including Buffer Memory and Direct Memory Access
Control Block (DMA) integrated into one single chip.
It has all the hardware including Buffer Memory and
Direct Memory Access (DMA) that enables convenient
access to its peripheral IO and memories from system bus
which is similar to simple memory devices. ASDL-7021 is
a class of its own as unlike conventional LSI which utilizes
external DMA for implementing fast infrared transfer,
complicated bus timing and required additional logic for
its interface.
ASDL-7021 utilizes two memory banks for external access
and internal DMA access; these 2 banks are interchange-
able to prevent bus contention. These two banks can be
switched using memory select function of the internal
register and separates internal bus from external, which
enables parallel operation of external microcontroller
operation and internal IrDA data transfer operation.
ASDL-7021 has embedded Universal Remote Control (RC)
function for general purpose remote control communica-
tion.
Together with Lite-On FIR transceiver and IrSimple
software, ASDL-7021 is designed to provide Industry
a total solution for high speed wireless connectivity
solution in miniature packaging.
Applications
• Mobile Data Communication and Universal Remote
Control
- Mobile Phones
- PDAs
- Digital Still Camera
- Printer
- Notebooks
- Handy Terminal
- Dongles
- Industrial and Medical Instrument
Features
General Features
• Interfaces with IrDA Compliant IR Transceiver
up to VFIR
• Miniature 48 pin TFBGA Package
Height : 1.2 mm
Width : 4.0 mm
Depth : 4.0 mm
• 8-bit Memory Mapped Interface
• Input clock of 48 MHz
• 4 transmission speed in 3 Blocks
- SIR Block (2.4 to 115.2Kbps)
- FIR Block (1.152Mbps for MIR and 4Mbps for FIR)
- VFIR Block (16Mbps)
• Operating temperature from -40° C ~ 85°C
- Critical parameters are guaranteed over
temperature and supply voltage
• Core Power Supply = 1.8V
Clock Power Supply = 3.3V
IO Power Supply =1.8V, 2.5V, 3.3V
• RAM Block with On-Chip buffer memory of 8KByte x 2
Bank Configuration
- 1 bank for external access x 8 bit width
- 1 bank for internal access x 8 bit width through
on-chip DMA block
- These 2 banks can be switched
- Each transmit and receive have their own buffer
memory of 8KByte x 2
CPU
BANK0
FIR block
BANK1
DMA
CPU
DMA
FIR block
BANK1