LTC2974_15 Datasheet, PDF (94/98 Pages) Linear Technology – 4-Channel PMBus Power System Manager Featuring Accurate Output Current Measurement

LTC2974
Applications Information
PCB Assembly and Layout Suggestions
Bypass Capacitor Placement
The LTC2974 requires 0.1µF bypass capacitors between
the V_DD33 pins and GND, the V_DD25 pin and GND, and the
REFP pin and REFM pin. If the chip is being powered from
the V_PWR input, then that pin should also be bypassed to
GND by a 0.1µF capacitor. In order to be effective, these
capacitors should be made of a high quality ceramic
dielectric such as X5R or X7R and be placed as close to
the chip as possible.
Exposed Pad Stencil Design
The LTC2974’s package is thermally and electrically ef-
ficient. This is enabled by the exposed die attach pad on
the under side of the package which must be soldered
down to the PCB or mother board substrate. It is a good
practice to minimize the presence of voids within the
exposed pad inter-connection. Total elimination of voids
is difficult, but the design of the exposed pad stencil is
key. Figure 42 shows a suggested screen print pattern.
The proposed stencil design enables out-gassing of the
solder paste during reflow as well as regulating the finished
solder thickness. See IPC7525A
Unused ADC Sense Inputs
Connect all unused ADC sense inputs (V_SENSEPn,
V_SENSEMn , I_SENSEPn or I_SENSEMn) to GND. In a system
where the inputs are connected to removable cards and
may be left floating in certain situations, connect the inputs
to GND using 100k resistors. Place the 100k resistors
before any filter components, as shown in Figure 41, to
2974fc
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For more information www.linear.com/LTC2974