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LTC6957-3_15 Datasheet, PDF (9/36 Pages) Linear Technology – Low Phase Noise, Dual Output Buffer/Driver/ Logic Converter
LTC6957-1/LTC6957-2/
LTC6957-3/LTC6957-4
Electrical Characteristics LTC6957-3/LTC6957-4
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= 25°C.
are with
respect to ground.
SYMBOL PARAMETER
Digital Logic Inputs
VIH
High Level SD or Filt Input Voltage
VIL
Low Level SD or Filt Input Voltage
IIN_DIG Input Current SD or Filt Pins
Additive Phase Noise and Jitter
fIN = 300MHz Sine Wave, 7dBm (FILTA = L, FILTB = L)
10Hz Offset
100Hz Offset
1kHz Offset
10kHz Offset
100kHz Offset
>1MHz Offset
Jitter (10Hz to 150MHz)
Jitter (12kHz to 20MHz)
fIN = 122.88MHz Sine Wave, 0dBm (FILTA = H, FILTB = L)
10Hz Offset
100Hz Offset
1kHz Offset
10kHz Offset
100kHz Offset
>1MHz Offset
Jitter (10Hz to 61.44MHz)
Jitter (12kHz to 20MHz)
fIN = 100MHz Sine Wave, 10dBm (FILTA = L, FILTB = L)
10Hz Offset
100Hz Offset
1kHz Offset
10kHz Offset
100kHz Offset
>1MHz Offset
Jitter (10Hz to 50MHz)
Jitter (12kHz to 20MHz)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Input pins IN+, IN–, FILTA, FILTB, SD1 and SD2 are protected by
steering diodes to either supply. If the inputs go beyond either supply rail,
the input current should be limited to less than 10mA. If pushing current
into FILTB, the Pin 6 voltage must be limited to 4V. On the logic pins
(FILTA, FILTB, SD1 and SD2) the Absolute Maximum input current applies
CONDITIONS
MIN
TYP MAX UNITS
l V+ – 0.4
V
l
0.4
V
l
0.1
±10
µA
–123
dBc/Hz
–133
dBc/Hz
–143
dBc/Hz
–152
dBc/Hz
–156
dBc/Hz
–156
dBc/Hz
146
fsRMS
53
fsRMS
–132
–142
–150.6
–156.5
–157.4
–157.4
192
109
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
fsRMS
fsRMS
–135
–145
–153
–159.8
–161
–161
142
90
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
fsRMS
fsRMS
only at the maximum operating supply voltage of 3.45V; 10mA of input
current with the absolute maximum supply voltage of 3.6V may create
permanent damage from voltage stress.
Note 3: With 3.6V Absolute Maximum supply voltage, the LTC6957-3/
LTC6957-4 CMOS outputs can sink 30mA while low, and source 30mA
while high without damage. However, if overdriven or subject to an
inductive load kick outside the supply rails, 30mA can create damaging
voltage stress and is not guaranteed unless VDD is limited to 3.15V.
6957f
For more information www.linear.com/LTC6957-1
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