LTC3626_15 Datasheet, PDF (9/28 Pages) Linear Technology – 20V, 2.5A Synchronous Monolithic Step-Down Regulator with Current and Temperature Monitoring

LTC3626
Pin Functions
ITH (Pin 11): Error Amplifier Output and Switching Regula-
tor Compensation Point. Connect this pin to appropriate
external components to compensate the regulator loop
frequency response. Connect this pin to INTV_CC to use
the default internal compensation.
RT (Pin 12): Oscillator Frequency Program Pin. Connect
an external resistor, between 640k to 105k, from this pin
to SGND to program the LTC3626 switching frequency
from 500kHz to 3MHz. When RT is tied to INTV_CC, the
switching frequency will default to 2MHz (typical).
RUN (Pin 13): Regulator Enable Pin. Enables chip opera-
tion by applying a voltage above 1.25V. A voltage below
1.0V on this pin places the part into shutdown. Do not
float this pin.
SV_IN (Pin 14): Signal Power Supply Input. This pin sup-
plies current to the internal 3.3V regulator.
PV_IN (Pins 15, 16): Main Power Supply Input. These pins
should be closely decoupled to PGND with a low ESR
capacitor of value 10µF or more.
MODE/SYNC (Pin 17): Mode Selection and External
Synchronization Input. This pin places the LTC3626 into
forced continuous operation when tied to ground. High
efficiency Burst Mode operation is enabled by either
floating this pin or tying this pin to INTV_CC. When driven
with an external clock, an internal phase-locked loop
will synchronize the phase and frequency of the internal
oscillator to that of incoming clock signal. During external
clock synchronization, the LTC3626 will default to forced
continuous operation.
PGOOD (Pin 18): Open-Drain Power Good Output Pin.
PGOOD is pulled to ground when the voltage at the FB pin
is not within ±8% (typical) of the internal 0.6V reference.
PGOOD becomes high impedance once the voltage at
the FB pin returns to within ±5% (typical) of the internal
reference.
SW (Pins 19, 20): Switch Node Connection to Inductor.
Connect this pin to the SW side of the external inductor.
The normal operation voltage swing of this pin ranges
from ground to PV_IN.
PGND (Exposed Pad Pin 21): Power Ground Pin. The (–)
terminal of the input bypass capacitor, C_IN, and the (–) of
the output capacitor, C_OUT, should be tied to this pin with
a low impedance connection. This pin must be soldered
to the PCB to provide low impedance electrical contact to
ground and good thermal contact to the PCB.
For more information www.linear.com/LTC3626
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