LTC3614_15 Datasheet, PDF (9/30 Pages) Linear Technology – 4A, 4MHz Monolithic Synchronous Step-Down DC/DC Converter

LTC3614
Pin Functions
SRLIM/DDR (Pin 1): Slew Rate Limit. Tying this pin to
ground selects maximum slew rate. Minimum slew rate
is selected when the pin is open. Connecting a resistor
from SRLIM/DDR to ground allows the slew rate to be
continuously adjusted. If SRLIM/DDR is tied to S_VIN, DDR
mode is selected. In DDR mode the slew rate limit is set
to maximum.
RT/SYNC (Pin 2): Oscillator Frequency. This pin provides
three ways of setting the constant switching frequency:
1. Connecting a resistor from RT/SYNC to ground will set
the switching frequency based on the resistor value.
2. Driving the RT/SYNC pin with an external clock signal
will synchronize the LTC3614 to the applied frequency.
The slope compensation is automatically adapted to the
external clock frequency.
3. Tying the RT/SYNC pin to SV_IN enables the internal
2.25MHz oscillator frequency.
SGND (Pin 3): Signal Ground. All small-signal and com-
pensation components should connect to this ground,
which in turn should connect to PGND at a single point.
PV_IN (Pins 4, 10, 11, 17): Power Input Supply. PV_IN
connects to the source of the internal P-channel power
MOSFET. This pin is independent of SV_IN and may be con-
nected to the same voltage or to a lower voltage supply.
SW (Pins 5, 6, 7, 8, 13, 14, 15, 16): Switch Node. Con-
nection to the inductor. These pins connect to the drains
of the internal power MOSFET switches.
NC (Pins 9, 12): Can be connected to ground or left open.
SV_IN (Pin 18): Signal Input Supply. This pin powers the
internal control circuitry and is monitored by the under-
voltage lockout comparator.
RUN (Pin 19): Enable Pin. Forcing this pin to ground shuts
down the LTC3614. In shutdown, all functions are disabled
and the chip draws <1µA of supply current.
PGOOD (Pin 20): Power Good. This open-drain output is
pulled down to SGND on start-up and while the FB voltage
is outside the power good voltage window. If the FB volt-
age increases and stays inside the power good window
for more than 100µs the PGOOD pin is released. If the
FB voltage leaves the power good window for more than
100µs the PGOOD pin is pulled down.
In DDR mode (DDR = V_IN), the power good window moves
in relation to the actual TRACK/SS pin voltage. During
up/down tracking the PGOOD pin is always pulled down.
In shutdown the PGOOD output will actively pull down
and may be used to discharge the output capacitors via
an external resistor.
MODE (Pin 21): Mode Selection. Tying the MODE pin
to SV_IN or SGND enables pulse-skipping mode or Burst
Mode operation (with an internal Burst Mode clamp),
respectively. If this pin is held at slightly higher than half
of SV_IN, forced continuous mode is selected. Connecting
this pin to an external voltage between 0.45V and 0.8V
selects Burst Mode operation with the burst clamp set to
the pin voltage. See the Operation section for more details.
V_FB (Pin 22): Voltage Feedback Input Pin. Senses the
feedback voltage from the external resistive divider across
the output.
ITH (Pin 23): Error Amplifier Compensation. The current
comparator’s threshold increases with this control volt-
age. Tying this pin to SV_IN enables internal compensation
and AVP mode.
TRACK/SS (Pin 24): Track/External Soft-Start/External
Reference. Start-up behavior is programmable with the
TRACK/SS pin:
1. Tying this pin to SV_IN selects the internal soft-start
circuit.
2. External soft-start timing can be programmed with a
capacitor to ground and a resistor to SV_IN.
3. TRACK/SS can be used to force the LTC3614 to track
the start-up behavior of another supply.
The pin can also be used as external reference input. See
the Applications Information section for more information.
PGND (Exposed Pad Pin 25): Power Ground. This pin
connects to the source of the internal N-channel power
MOSFET. This pin should be connected close to the (–)
terminal of C_IN and C_OUT.
For more information www.linear.com/LTC3614
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