LTC3606B Datasheet, PDF (9/20 Pages) Linear Technology – 800mA Synchronous Step-Down DC/DC with Average Input Current Limit

LTC3606B
OPERATION
Figure 1a shows V_IN (I_IN) current below input current
limit with a C_LIM capacitor of 0.1μF. When the load pulse
is applied, under the specified condition, I_LIM current is
1.1A/55k • 0.66 = 13.2μA, where 0.66 is the duty cycle.
It will take a little more than 7.5ms to charge the C_LIM
capacitor from 0V to 1V, after which the LTC3606B begins
to limit input current. The I_IN current is not limited during
this 7.5ms time and is more than 725mA. This current
transient may cause the input supply to temporarily
droop if the supply current compliance is exceeded, but
recovers after the input current limit engages. The output
will continue to deliver the required current load while the
output voltage droops to allow the input voltage to remain
regulated during input current limit.
For applications with short load pulse duration, a smaller
C_LIM capacitor may be the better choice as in the example
shown in Figure 1b. In this example, a 577μs, 0A to 2A
output pulse is applied once every 4.7ms. A C_LIM capacitor
of 2.2nF requires 92μs for V_RLIM to charge from 0V to 1V.
During this 92μs, the input current limit is not yet engaged
and the output must deliver the required current load.
This may cause the input voltage to droop if the current
compliance is exceeded. Depending on how long this time
is, the V_IN supply decoupling capacitor can provide some
of this current before V_IN droops too much. In applications
with a bigger V_IN supply decoupling capacitor and where
V_IN supply is allow to droop closer to dropout, the C_LIM
capacitor can be increased slightly. This will delay the
start of input current limit and artificially regulated V_OUT
before input current limit is engaged. In this case, within
the 577μs load pulse, the V_OUT voltage will stay artificially
regulated for 92μs out of the total 577μs before the input
current limit activates. This approach may be used if a
faster recovery on the output is desired.
Selecting a very small C_LIM will speed up response time
but it can put the device within threshold of interfering
with normal operation and input current limit in every
few switching cycles. This may be undesirable in terms
of noise. Use 2πRC >> 100/clock frequency (2.25MHz) as
a starting point, R being R_LIM, C being C_LIM.
V_OUT
2V/DIV
I_IN
500mA/DIV
V_RLIM
1V/DIV
I_L
1A/DIV
50ms/DIV
3606B F01a
V_IN = 5V, 500mA COMPLIANT
R_LIM = 116k, C_LIM = 0.1μF
I_LOAD = 0A to 1.1A, C_OUT = 2.2mF, V_OUT = 3.3V
I_LIM = 475mA
Figure 1a. Input Current Limit Within 100ms Load Pulses
V_OUT
200mV/DIV
V_IN
AC-COUPLED
1V/DIV
I_OUT
500mA/DIV
I_IN
500mA/DIV
1ms/DIV
3606B F01b
V_IN = 5V, 500mA COMPLIANT
R_LIM = 116k, C_LIM = 2200pF
I_LOAD = 0A to 2A, C_OUT = 2.2mF, V_OUT = 3.3V
I_LIM = 475mA
Figure 1b. Input Current Limit Within
577μs, 2A Repeating Load Pulses
3606bfa
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