LTC3453_15 Datasheet, PDF (9/12 Pages) Linear Technology – Synchronous Buck-Boost High Power White LED Driver

LTC3453
APPLICATIO S I FOR ATIO
Input Capacitor Selection
Since the V_IN pin is the supply voltage for the IC it is
recommended to place at least a 2.2µF, low ESR bypass
capacitor to ground. See Table 2 for a list of component
suppliers.
Table 2. Capacitor Vendor Information
SUPPLIER
WEB SITE
AVX
www.avxcorp.com
Sanyo
www.sanyovideo.com
Taiyo Yuden
www.t-yuden.com
TDK
www.component.tdk.com
Output Capacitor Selection
The bulk value of the capacitor is set to reduce the ripple
due to charge into the capacitor each cycle. The steady
state ripple due to charge is given by:
( ) _%Ripple
_
Boost
=
I_OUT(MAX) • V_OUT – V_IN(MIN)
C_OUT • V_OUT2 • f
• 100
%
( ) _%Ripple
_ Buck
=
8
V_IN(MAX) – V_OUT
• V_IN(MAX) • f² •L
• 100
• C_OUT
%
where C_OUT = output filter capacitor, F
The output capacitance is usually many times larger in
order to handle the transient response of the converter.
For a rule of thumb, the ratio of the operating frequency to
the unity-gain bandwidth of the converter is the amount
the output capacitance will have to increase from the
above calculations in order to maintain the desired tran-
sient response.
The other component of ripple is due to the ESR (equiva-
lent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden, TDK,
AVX ceramic capacitors, AVX TPS series tantalum capaci-
tors or Sanyo POSCAP are recommended. For the white
LED application, a 4.7µF capacitor value is recommended.
See Table 2 for a list of component suppliers.
Optional Schottky Diodes
Schottky diodes across the synchronous switches B and
D are not required, but provide a lower drop during the
break-before-make time (typically 20ns) of the NMOS to
PMOS transition, improving efficiency. Use a Schottky
diode such as an MBRM120T3 or equivalent. Do not use
ordinary rectifier diodes, since the slow recovery times
will compromise efficiency.
Closing the Feedback Loop
The LTC3453 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(Buck, Boost, Buck/Boost), but is usually no greater than
15. The output filter exhibits a double pole response
given by:
f_{FILTER_POLE} = _{2 • π •}
1
Hz
L • C_OUT
where C_OUT is the output filter capacitor.
The output filter zero is given by:
f_{FILTER_ ZERO}
=
2
•
π
1
• R_ESR
•
C_OUT
Hz
where R_ESR is the capacitor equivalent series resistance.
A troublesome feature in Boost mode is the right-half
plane zero (RHP), and is given by:
f_RHPZ
=
V_IN2
2 • π •I_OUT • L• V_OUT
Hz
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorpo-
rated to stabilize the loop but at a cost of reduced band-
width and slower transient response. To ensure proper
phase margin, the loop requires to be crossed over a
decade before the LC double pole.
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