LTC3428 Datasheet, PDF (9/12 Pages) Linear Technology – 4A, 2MHz Dual Phase Step-Up DC/DC Converter in 3mm 3mm DFN

APPLICATIO S I FOR ATIO
This zero causes a gain increase with phase lag. With
heavy loads, this can occur at a relatively low frequency.
For this reason, loop gain is typically rolled off below the
RHP zero frequency.
A typical error amp compensation is shown in Figure 3 and
in the Typical Application section.
The equations for the loop dynamics are as follow:
f_POLE1
≈
2•
π
1
• 400e6 • C_C1
f_ZERO1
≈
2•π
1
• R_Z
• C_C1
f_ZERO2
≈
2•
π
• R_Z
1
• (C_C2
+
5pF)
LTC3428
1.243V
FB
V_C
V_OUT
R1
R2
5pF
R_Z
C_C2
C_C1
3428 F03
Figure 3.
3428f
9