LTC3217_15 Datasheet, PDF (9/12 Pages) Linear Technology – 600mA Low Noise Multi-LED Camera Light Charge Pumps

LTC3217
APPLICATIONS INFORMATION
V_BAT, CPO Capacitor Selection
The style and value of the capacitors used with the LTC3217
determine several important parameters such as regulator
control loop stability, output ripple, charge pump strength
and minimum start-up time.
To reduce noise and ripple, it is recommended that low
equivalent series resistance (ESR) ceramic capacitors are
used for both CV_BAT and C_CPO. Tantalum and aluminum
capacitors are not recommended due to high ESR.
The value of C_CPO directly controls the amount of output
ripple for a given load current. Increasing the size of C_CPO
will reduce output ripple at the expense of higher start-up
current. The peak-to-peak output ripple of the 1.5x mode
is approximately given by the expression:
I_RIPPLEP-P
=
I_OUT
(3f_OSC • C_CPO)
(4)
Where f_OSC is the LTC3217 oscillator frequency or typically
850kHz and C_CPO is the output storage capacitor.
The output ripple in 2x mode is very small due to the fact
that load current is supplied on both cycles of the clock.
Both style and value of the output capacitor can significantly
affect the stability of the LTC3217. As shown in the Block
Diagram, the LTC3217 uses a control loop to adjust the
strength of the charge pump to match the required output
current. The error signal of the loop is stored directly on
the output capacitor. The output capacitor also serves as
the dominant pole for the control loop. To prevent ringing
or instability, it is important for the output capacitor to
maintain at least 1μF of capacitance over all conditions.
In addition, excessive output capacitor ESR will tend to
degrade the loop stability. The ESR of the output capacitor
should be <100mΩ. Multilayer ceramic chip capacitors
typically have exceptional ESR performance. MLCCs
combined with a tight board layout will result in very
good stability. As the value of C_CPO controls the amount
of output ripple, the value of CV_BAT controls the amount of
ripple present at the input pin (V_BAT). The LTC3217 input
current will be relatively constant while the charge pump
is either in the input charging phase or the output charging
phase but will drop to zero during the clock non-overlap
times. Since the non-overlap time is small (~25ns), these
missing “notches” will result in only a small perturbation
on the input power supply line. Note that a higher ESR
capacitor such as tantalum will have higher input noise
due to the higher ESR. Therefore, ceramic capacitors are
recommended for low ESR. Input noise can be further
reduced by powering the LTC3217 through a very small
series inductor as shown in Figure 4. A 10nH inductor
will reject the fast current notches, thereby presenting a
nearly constant current load to the input power supply.
For economy, the 10nH inductor can be fabricated on the
PC board with about 1cm (0.4") of PC board trace.
V_BAT
LTC3217
GND
3217 F04
Figure 4. 10nH Inductor Used for Input Noise Reduction
(Approximately 1cm of Board Trace)
Flying Capacitor Selection
Warning: Polarized capacitors such as tantalum or
aluminum should never be used for the flying capaci-
tors since their voltage can reverse upon start-up of the
LTC3217. Ceramic capacitors should always be used for
the flying capacitors.
The flying capacitors control the strength of the charge
pump. In order to achieve the rated output current it is
necessary to have at least 1.6μF of capacitance for each
of the flying capacitors. Capacitors of different materials
lose their capacitance with higher temperature and voltage
at different rates. For example, a ceramic capacitor made
of X7R material will retain most of its capacitance from
–40°C to 85°C whereas a Z5U or Y5V style capacitor will
lose considerable capacitance over that range. Z5U
3217fa
9