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LTC2355-12_09 Datasheet, PDF (9/18 Pages) Linear Technology – Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown
LTC2355-12/LTC2355-14
Timing Diagram
LTC2355-12 Timing Diagram
t2
t3
t1
t7
16 17 1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 1
SCK
t4
t5
CONV
INTERNAL
S/H STATUS
t6
SAMPLE
SDO
t8
Hi-Z
HOLD
t10
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
*BITS MARKED "X" AFTER D0 SHOULD BE IGNORED.
14-BIT DATA WORD
tCONV
tTHROUGHPUT
tACQ
SAMPLE
HOLD
t8
t9
X
X
Hi-Z
2355 TD01
16 17
SCK
t4
CONV
INTERNAL
S/H STATUS
t6
SAMPLE
SDO
t2
t3
1
2
t8
Hi-Z
LTC2355-14 Timing Diagram
t1
t7
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 1
t5
HOLD
t10
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2
14-BIT DATA WORD
tCONV
tTHROUGHPUT
tACQ
SAMPLE
HOLD
t8
t9
D1 D0
Hi-Z
2355 TD01b
Nap Mode and Sleep Mode Waveforms
SLK
t1
t1
CONV
NAP
SLEEP
t12
VREF NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS
2355 TD02
SCK to SDO Delay
SCK
t8
t10
SDO
VIH
SCK
VOH
SDO
VOL
VIH
t9
90%
10%
2355 TD03
2355fa