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LTC1159_15 Datasheet, PDF (9/20 Pages) Linear Technology – High Efficiency Synchronous Step-Down Switching Regulators
LTC1159
LTC1159-3.3/LTC1159-5
APPLICATIO S I FOR ATIO
inductor ripple current and consequent output voltage
ripple which can cause Burst Mode operation to be falsely
triggered in the LTC1159. Do not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a low loss core
material for toroids, but it is more expensive than ferrite.
A reasonable compromise from the same manufacturer is
Kool Mµ. Toroids are very space efficient, especially when
you can use several layers of wire. Because they generally
lack a bobbin, mounting is more difficult. However, new
surface mount designs available from Coiltronics do not
increase the height significantly.
Power MOSFET Selection
Two external power MOSFETs must be selected for use
with the LTC1159: a P-channel MOSFET for the main
switch and an N-channel MOSFET for the synchronous
switch.
The peak-to-peak drive levels are set by the VCC voltage on
the LTC1159. This voltage is typically 4.5V during start-up
and 5V to 7V during normal operation (see EXTVCC Pin
Connection). Consequently, logic-level threshold
MOSFETs must be used in most LTC1159 family applica-
tions. The only exception is applications in which EXTVCC
is powered from an external supply greater than 8V, in
which standard threshold MOSFETs (VGS(TH) < 4V) may be
used. Pay close attention to the BVDSS specification for the
MOSFETs as well; many of the logic-level MOSFETs are
limited to 30V.
Selection criteria for the power MOSFETs include the “ON”
resistance RDS(ON), reverse transfer capacitance CRSS,
input voltage and maximum output current. When the
LTC1159 is operating in continuous mode, the duty cycle
for the P-channel MOSFET is given by:
P-Ch
Duty
Cycle
=
VOUT
VIN
N-Ch
Duty
Cycle
=
VIN
– VOUT
VIN
The MOSFET dissipations at maximum output current are
given by:
P-Ch PD =
VOUT
VIN
(IMAX)2 (1 + ∂P) RDS(ON) +
k(VIN)2 (IMAX) (CRSS) (f)
N-Ch
PD
=
VIN
– VOUT
VIN
(IMAX)2
(1
+
∂N)
RDS(ON)
where ∂ is the temperature dependency of RDS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the P-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For VIN < 20V the
high current efficiency generally improves with larger
MOSFETs, while for VIN > 20V the transition losses rapidly
increase to the point that the use of a higher RDS(ON)
device with lower CRSS actually provides higher effi-
ciency. The N-channel MOSFET losses are the greatest at
high input voltage or during a short circuit when the
N-channel duty cycle is nearly 100%.
The term (1 + ∂) is generally given for a MOSFET in the form
of a normalized RDS(ON) vs Temperature curve, but
∂ = 0.007/°C can be used as an approximation for low
voltage MOSFETs. CRSS is usually specified in the MOSFET
electrical characteristics. The constant k = 5 can be used for
the LTC1159 to estimate the relative contributions of the
two terms in the P-channel dissipation equation.
The Schottky diode D1 shown in Figure 1 only conducts
during the dead time between the conduction of the two
power MOSFETs. D1 prevents the body diode of the
N-channel MOSFET from turning on and storing charge
during the dead time, which could cost as much as 1% in
efficiency (although there are no other harmful effects if
D1 is omitted). Therefore, D1 should be selected for a
forward voltage of less than 0.6V when conducting IMAX.
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