LTC3670_15 Datasheet, PDF (8/12 Pages) Linear Technology – Monolithic 400mA Buck Regulator with Dual 150mA

LTC3670
OPERATION
Switch Slew-Rate Control
The buck regulator contains new patent-pending circuitry
to limit the slew rate of the switch node (SW pin). This
new circuitry is designed to transition the switch node
over a period of a couple nanoseconds, significantly
reducing radiated EMI and conducted supply noise while
maintaining high efficiency.
Each LDO can be enabled or disabled via its own enable
pin. When disabled with V_IN still applied, an internal
pull-down resistor is switched in to help bring the output
to ground. When an LDO is enabled, a soft-start circuit
ramps its regulation point from zero to final value over a
period of roughly 0.1ms, reducing the required V_IN inrush
current.
LOW DROPOUT LINEAR REGULATORS (LDOs)
The LTC3670 contains two independent LDO regulators,
each supporting a load of up to 150mA. Each LDO takes
power from the V_IN pin and drives its output pin with the
goal of bringing its feedback pin voltage to 0.8V. In the
usual case, a resistor divider is connected between the
LDO’s output pin, feedback pin and ground, in order to
close the control loop and program the output voltage. For
stability, each LDO output must be bypassed to ground
with a minimum 1μF ceramic capacitor.
LOW V_IN SUPPLY UNDERVOLTAGE LOCKOUT
An undervoltage lockout (UVLO) circuit shuts down the
LTC3670 when V_IN drops below about 2.2V.
POWER GOOD DETECTION
The LTC3670 has a built-in supply monitor. If the feedback
voltage of every enabled regulator is above 92% of its
regulation value, the PGOOD pin becomes high impedance.
Otherwise, or if no regulators are enabled, the PGOOD pin
is driven to ground by an internal open-drain NMOS.
The PGOOD pin may be connected through a pull-up
resistor to a supply voltage of up to 5.5V, independent of
the V_IN pin voltage.
3670f
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