LTC3526L-2_15 Datasheet, PDF (8/16 Pages) Linear Technology – 550mA 2MHz Synchronous Step-Up DC/DC Converters

LTC3526L-2/LTC3526LB-2
Operation _{(Refer to Block Diagram)}
exceeds the input by 0.24V, the IC powers itself from
V_OUT instead of V_IN. At this point the internal circuitry has
no dependency on the V_IN input voltage, eliminating the
requirement for a large input capacitor. The input voltage
can drop as low as 0.5V. The limiting factor for the ap-
plication becomes the availability of the power source to
supply sufficient energy to the output at low voltages, and
maximum duty cycle, which is clamped at 90% typical.
Note that at low input voltages, small voltage drops due
to series resistance become critical, and greatly limit the
power delivery capability of the converter.
Low Noise Fixed Frequency Operation
Soft-Start
The LTC3526L-2/LTC3526LB-2 contain internal circuitry
to provide soft-start operation. The soft-start circuitry
slowly ramps the peak inductor current from zero to its
peak value of 750mA (typical) in approximately 0.5ms,
allowing start-up into heavy loads. The soft-start circuitry
is reset in the event of a shutdown command or a thermal
shutdown.
Oscillator
An internal oscillator sets the switching frequency to
2MHz.
Shutdown
Shutdown is accomplished by pulling the SHDN pin
below 0.3V and enabled by pulling the SHDN pin above
0.8V. Although SHDN can be driven above V_IN or V_OUT
(up to the absolute maximum rating) without damage,
the LTC3526L-2/LTC3526LB-2 have a proprietary test
mode that may be engaged if SHDN is held in the range
of 0.5V to 1V higher than the greater of V_IN or V_OUT. If
the test mode is engaged, normal PWM switching action
is interrupted, which can cause undesirable operation
in some applications. Therefore, in applications where
SHDN may be driven above V_IN, a resistor divider or other
means must be employed to keep the SHDN voltage below
(V_IN + 0.4V) to prevent the possibility of the test mode
being engaged. Please refer to Figure 1 for two possible
implementations.

LTC3526L-2/LTC3526LB-2
V_IN
4M
±30%
SHDN
LTC3526L-2/LTC3526LB-2
4M
±30%
SHDN
V_CNTRL
R
1M
R > (V_CNTRL/(V_IN + 0.4) – 1)MΩ
ZETEX ZC2811E
V_CNTRL
1M
3526lb2 F01
Figure 1. Recommended Shutdown Circuits when Driving
SHDN above V_IN
Error Amplifier
The positive input of the transconductance error amplifier
is internally connected to the 1.195V reference and the
negative input is connected to FB. Clamps limit the mini-
mum and maximum error amp output voltage for improved
large-signal transient response. Power converter control
loop compensation is provided internally. An external
resistive voltage divider from V_OUT to ground programs
the output voltage via FB from 1.5V to 5.25V.
V_OUT
=
1.195V
•


1+
R2 
R1
Current Sensing
Lossless current sensing converts the peak current signal of
the N-channel MOSFET switch into a voltage that is summed
with the internal slope compensation. The summed signal
is compared to the error amplifier output to provide a peak
current control command for the PWM.
Current Limit
The current limit comparator shuts off the N-channel
MOSFET switch once its threshold is reached. The cur-
rent limit comparator delay to output is typically 60ns.
Peak switch current is limited to approximately 750mA,
independent of input or output voltage, unless V_OUT falls
below 0.7V, in which case the current limit is cut in half.
3526lb2fa