LTC1291 Datasheet, PDF (8/20 Pages) Linear Technology – Single Chip 12-Bit Data Acquisition System

LTC1291
APPLICATI S I FOR ATIO
DATA (D_IN/D_OUT). Data transfer is initiated by a falling chip
select (CS) signal. After CS falls the LTC1291 looks for a
start bit. After the start bit is received a 4-bit input word is
shifted into the D_IN input which configures the LTC1291
and starts the conversion. After one null bit, the result of
the conversion appears MSB-first on the D_OUT line. The
conversion result is output, bit by bit, as the conversion is
performed. At the end of the data exchange CS should be
brought high. This resets the LTC1291 in preparation for
the next data exchange.
MSB-FIRST DATA (MSBF = 1)
CS
Operating Sequence
(Example: Differential Inputs (CH0+, CH1–))
t_CYC
CLK
D_IN
D_OUT
START ODD/
PS
SIGN
SGL/
MSBF
DIFF
HI-Z
B11
t_SMPL
t_CONV
DON'T CARE
B1 B0
FILLED WITH ZEROES
DON'T
CARE
LSB-FIRST DATA (MSBF = 0)
CS
CLK
START ODD/
PS
SIGN
D_IN
SGL/
MSBF
DIFF
D_OUT
HI-Z
B11
t_SMPL
t_CYC
t_CONV
DON'T CARE
B1 B0 B1
Power Shutdown Operating Sequence
(Example: Differential Inputs (CH0+, CH1–) and MSB-First Data)
DON’T
CARE
B11
FILLED WITH
ZEROES
1291 AI03
CS
REQUEST POWER SHUTDOWN
SHUTDOWN* NEW CONVERSION BEGINS
CLK
D_IN
D_OUT
START
ODD/
PS
SIGN
SGL/
MSBF
DIFF
HI-Z
B11
* STOPPING THE CLOCK WILL HELP REDUCE POWER CONSUMPTION
CS CAN BE BROUGHT HIGH ONCE D_IN HAS BEEN CLOCKED IN
8
DON'T CARE
DATA NOT VALID
B0 FILLED WITH
ZEROES
START ODD/
PS
SIGN
SGL/
MSBF
HI-Z
DIFF
1291 AI04