LT1024_15 Datasheet, PDF (8/12 Pages) Linear Technology – Dual, Matched Picoampere, Microvolt Input, Low Noise Op Amp

LT1024
APPLICATIO S I FOR ATIO
Achieving Picoampere/Microvolt Performance
In order to realize the picoampere/microvolt level
accuracy of the LT1024, proper care must be exercised.
For example, leakage currents in circuitry external to the
op amp can significantly degrade performance. High qual-
ity insulation should be used (e.g., Teflon™, Kel-F); clean-
ing of all insulating surfaces to remove fluxes and other
residues will probably be required. Surface coating may be
necessary to provide a moisture barrier in high humidity
environments.
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close to
that of the inputs: in inverting configurations, the guard
ring should be tied to ground; in noninverting connec-
tions, to the inverting input. Guarding both sides of the
printed circuit board is required. Bulk leakage reduction
depends on the guard ring width. Nanoampere level leak-
age into the offset trim terminals can affect offset voltage
and drift with temperature.
Teflon is a trademark of Dupont.
Microvolt level error voltages can also be generated in the
external circuitry. Thermocouple effects, caused by tem-
perature gradients across dissimilar metals at the con-
tacts to the input terminals, can exceed the inherent drift
of the amplifier. Air currents over device leads should be
minimized, package leads should be short, and the two
input leads should be as close together as possible and
maintained at the same temperature.
Test Circuit for Offset Voltage and its Drift with Temperature
R1
50k*
R2
100Ω*
R3
50k*
15V
14 (7)
3
(10)
–
LT1024
4₊
(11)
13
(6)
V₀
* RESISTORS MUST HAVE LOW
12 (5) ^{THERMOELECTRIC POTENTIAL}
** THIS CIRCUIT IS ALSO USED AS THE BURN-IN
–15V
CONFIGURATION FOR THE LT1024. WITH SUPPLY
VOLTAGES INCREASED TO ±20V, R1 = R3 = 20k,
R2 = 200Ω, AV = 100
V_O = 1000V_0S
LT1024 • AI02
1024fa
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