LTC3547 Datasheet, PDF (7/16 Pages) Linear Technology – Dual Monolithic 300mA Synchronous Step-Down Regulator

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OPERATIO (Refer to Functional Diagram )
The LTC3547 uses a constant-frequency current mode
architecture. The operating frequency is set at 2.25MHz.
Both channels share the same clock and run in-phase.
The output voltage is set by an external resistor divider
returned to the V_FB pins. An error amplifier compares the
divided output voltage with a reference voltage of 0.6V and
regulates the peak inductor current accordingly.
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle
when the V_FB voltage is below the reference voltage. The
current into the inductor and the load increases until the
peak inductor current (controlled by I_TH) is reached. The
RS latch turns off the synchronous switch and energy
stored in the inductor is discharged through the bottom
switch (N-channel MOSFET) into the load until the next
clock cycle begins, or until the inductor current begins to
reverse (sensed by the I_RCMP comparator).
The peak inductor current is controlled by the internally
compensated I_TH voltage, which is the output of the er-
ror amplifier. This amplifier regulates the V_FB pin to the
internal 0.6V reference by adjusting the peak inductor
current accordingly.
LTC3547
Dropout Operation
When the input supply voltage decreases toward the out-
put voltage the duty cycle increases to 100%, which is the
dropout condition. In dropout, the PMOS switch is turned
on continuously with the output voltage being equal to the
input voltage minus the voltage drops across the internal
P-channel MOSFET and the inductor.
An important design consideration is that the R_DS(ON)
of the P-channel switch increases with decreasing input
supply voltage (see Typical Performance Characteristics).
Therefore, the user should calculate the worst-case power
dissipation when the LTC3547 is used at 100% duty cycle
with low input voltage (see Thermal Considerations in the
Applications Information Section).
Soft-Start
In order to minimize the inrush current on the input by-
pass capacitor, the LTC3547 slowly ramps up the output
voltage during start-up. Whenever the RUN1 or RUN2 pin
is pulled high, the corresponding output will ramp from
zero to full-scale over a time period of approximately
650µs. This prevents the LTC3547 from having to quickly
charge the output capacitor and thus supplying an exces-
sive amount of instantaneous current.
Burst Mode Operation
To optimize efficiency, the LTC3547 automatically switches
from continuous operation to Burst Mode operation when
the load current is relatively light. During Burst Mode op-
eration, the peak inductor current (as set by I_TH) remains
fixed at approximately 60mA and the PMOS switch operates
intermittently based on load demand. By running cycles
periodically, the switching losses are minimized.
The duration of each burst event can range from a few
cycles at light load to almost continuous cycling with
short sleep intervals at moderate loads. During the sleep
intervals, the load current is being supplied solely from
the output capacitor. As the output voltage droops, the
error amplifier output rises above the sleep threshold,
signaling the burst comparator to trip and turn the top
MOSFET on. This cycle repeats at a rate that is dependent
on load demand.
Short-Circuit Protection
When either regulator output is shorted to ground, the
corresponding internal N-channel switch is forced on for
a longer time period for each cycle in order to allow the
inductor to discharge, thus preventing current runaway.
This technique has the effect of decreasing switching
frequency. Once the short is removed, normal operation
resumes and the regulator output will return to its nominal
voltage.
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