LTC1701 Datasheet, PDF (7/12 Pages) Linear Technology – 1MHz Step-Down DC/DC Converter in SOT-23

LTC1701
APPLICATIO S I FOR ATIO
Setting the Output Voltage
The LTC1701 develops a 1.25V reference voltage between
the feedback pin, V_FB, and the signal ground as shown in
Figure 2. The output voltage is set by a resistive divider
according to the following formula:
V_OUT
=

1.25V_1+
R2^
R1
To prevent stray pickup, a capacitor of about 5pF can be
added across R1, located close to the LTC1701. Unfortu-
nately, the load step response is degraded by this capaci-
tor. Using a good printed circuit board layout eliminates
the need for this capacitor. Great care should be taken to
route the V_FB line away from noise sources, such as the
inductor or the SW line.
V_OUT
LTC1701
V_FB
SGND
C_F
R2
1%
R1
5pF
100k
1%
1701 F02
Figure 2. Setting the Output Voltage
Transient Response
The OPTI-LOOP compensation allows the transient re-
sponse to be optimized for a wide range of loads and
output capacitors. The availability of the I_TH pin not only
allows optimization of the control loop behavior but also
provides a DC coupled and AC filtered closed-loop re-
sponse test point. The DC step, rise time and settling at this
test point truly reflects the closed-loop response. Assum-
ing a predominately second order system, phase margin
and/or damping factor can be estimated using the percent-
age of overshoot seen at this pin. The bandwidth can also
be estimated by examining the rise time at the pin.
The I_TH external components shown in the Figure 1 circuit
will provide an adequate starting point for most applica-
tions. The series R3-C3 filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and the
particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
feedback factor gain and phrase. An output current pulse
of 20% to 100% of full-load current having a rise time of
1µs to 10µs will produce output voltage and I_TH pin
waveforms that will give a sense of the overall loop
stability without breaking the feedback loop.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second-
order overshoot/DC ratio cannot be used to determine
phase margin. The gain of the loop increases with R3 and
the bandwidth of the loop increases with decreasing C3. If
R3 is increased by the same factor that C3 is decreased,
the zero frequency will be kept the same, thereby keeping
the phase the same in the most critical frequency range of
the feedback loop. In addition, a feed-forward capacitor,
C_F, can be added to improve the high frequency response,
as shown in Figure 2. Capacitor C_F provides phase lead by
creating a high frequency zero with R2 which improves the
phase margin.
The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance. For a detailed
explanation of optimizing the compensation components,
including a review of control loop theory, refer to Applica-
tion Note 76.
RUN Function
The I_TH/RUN pin is a dual purpose pin that provides the
loop compensation and a means to shut down the LTC1701.
Soft-start can also be implemented with this pin. Soft-start
reduces surge currents from V_IN by gradually increasing
the internal peak inductor current. Power supply sequenc-
ing can also be accomplished using this pin.
An external pull-up is required to charge the external
capacitor C3 in Figure 1. Typically, a 1M resistor between
V_IN and I_TH/RUN is used. When the voltage on I_TH/RUN
reaches about 0.8V the LTC1701 begins operating. At this
point the error amplifier pulls up the I_TH/RUN pin to the
normal operating range of 1.25V to 2.25V.
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