LTM9012 Datasheet, PDF (6/28 Pages) Linear Technology – Quad 14-Bit, 125Msps ADC with Integrated Drivers

LTM9012
Electrical Characteristics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND (unless otherwise
noted).
Note 3: Input pins are protected by steering diodes to either supply. If
the inputs should exceed either supply voltage, the input current should
be limited to less than 10mA. In addition, the inputs CHn ⁺, CHn ^– are
protected by a pair of back-to-back diodes. If the differential input voltage
exceeds 1.4V, the input current should be limited to less than 10mA.
Note 4: When these pin voltages are taken below GND or above V_DD, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below GND or above V_DD without latchup.
Note 5: When these pin voltages are taken below GND they will be
clamped by internal diodes. When these pin voltages are taken above V_DD
they will not be clamped by internal diodes. This product can handle input
currents greater than 100mA below GND without latchup.
Note 6: V_CC = 3.3V, V_DD = OV_DD = 1.8V, f_SAMPLE = 125MHz, 2-lane output
mode, differential ENC⁺/ENC^– = 2V_P-P sine wave, input range = 200mV_P-P
with differential drive, unless otherwise noted.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
best fit straight line to the transfer curve. The deviation is measured from
the center of the quantization band.
Note 8: Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 0000 and 11 1111 1111
1111 in 2’s complement output mode.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: The maximum sampling frequency depends on the speed grade
of the part and also which serialization mode is used. The maximum serial
data rate is 1000Mbps so t_SER must be greater than or equal to 1ns.
Note 12: Near-channel crosstalk refers to CH1 and CH2. Far channel
crosstalk refers to CH1 to CH4.
Timing Diagrams
2-Lane Output Mode, 16-Bit Serialization*
ANALOG
INPUT
ENC^–
ENC⁺
DCO^–
DCO⁺
FR^–
FR⁺
OUT#A^–
OUT#A⁺
t_AP
N
t_ENCH
N+1
t_ENCL
t_FRAME
t_DATA
t_SER
t_SER
t_PD
t_SER
D5 D3 D1 0 D13 D11 D9 D7 D5 D3 D1 0
D13 D11 D9
OUT#B^–
OUT#B⁺
D4 D2 D0
0 D12 D10 D8 D6 D4 D2 D0
0
D12 D10 D8
SAMPLE N-6
SAMPLE N-5
SAMPLE N-4
*SEE THE DIGITAL OUTPUTS SECTION
9012 TD01
9012f
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