LTM8008_15 Datasheet, PDF (6/16 Pages) Linear Technology – 72VIN, 6 Output DC/DC SEPIC Module Regulator

LTM8008
Pin Functions
V_IN (K4, L4): Input Supply Pin. Must be locally bypassed
with a 0.22μF or larger capacitor placed close to the pin.
RUN (F1, F2): Shutdown and Undervoltage Detect Pin.
An accurate 1.21V (nominal) falling threshold with ex-
ternally programmable hysteresis detects when power is
okay to enable switching. Rising hysteresis is generated
by the external resistor divider and an accurate internal
2μA pull-down current. An undervoltage condition resets
soft-start. Tie to 0.4V or less to disable the device and
reduce V_IN quiescent current below 70μA. Tie to INTV_CC
if this function is not used.
GND (Bank 1): Ground. Tie these GND pins to a local ground
plane under the LTM8008 and the circuit components.
In most applications, the bulk of the heat flow out of the
LTM8008 is through these pads, so the printed circuit
design has a large impact on the thermal performance of
the part. See the PCB Layout and Thermal Considerations
sections for more details.
SYNC (K3, L3): Frequency Synchronization Pin. It is used
to synchronize the switching frequency to an external clock.
If this feature is used, an R_T resistor should be chosen to
program a switching frequency 20% lower than the SYNC
pulse frequency. Tie the SYNC pin to GND if this feature is
not used. See the Synchronization section in Applications
Information.
RT (J1, J2): The RT pin is used to program the switching
frequency of the LTM8008 by connecting a resistor from
this pin to ground. Table 1 gives the resistor values that
correspond to the resultant switching frequency. Minimize
the capacitance at this pin.
SS (H1, H2): Soft-Start Pin. This pin modulates the com-
pensation pin voltage (V_C) clamp. The soft-start interval is
set with an external capacitor. The pin has a 10μA (typical)
pull-up current source to an internal 2.5V rail. The soft-
start pin is reset to GND by an undervoltage condition at
RUN, an INTV_CC undervoltage or overvoltage condition or
an internal thermal lockout.
V_C (G1, G2): Error Amplifier Compensation Pin. This is used
to stabilize the voltage loop with an external RC network.
INTV_CC (E1, E2): Regulated Supply for Internal Loads. This
is derived from V_IN and SPV; it must be bypassed with at
least a 4.7μF capacitor placed close to the pin.
SPV (A1, B1, A11, B11): SEPIC Output Voltage. This is
connected to the internal SEPIC feedback network and is
used to power the six post regulators. It must be locally
bypassed by at least 22µF. Apply a bypass capacitor at
each set of pins.
V_OUT1 (Bank 2): Output of the 5V, 500mA Linear Post
Regulator. It must be locally bypassed with at least 22µF.
V_OUT2 (A10, B10): Output of One of the Four 5V, 150mA
Linear Post Regulators. It must be bypassed with at
least 10µF.
V_OUT3 (A8, B8): Output of One of the Four 5V, 150mA Linear
Post Regulators. It must be bypassed with at least 10µF.
V_OUT4 (A6, B6): Output of One of the Four 5V, 150mA Linear
Post Regulators. It must be bypassed with at least 10µF.
V_OUT5 (A5, B5): Output of One of the Four 5V, 150mA Linear
Post Regulators. It must be bypassed with at least 10µF.
V_OUT6 (A2, A3, B2): Output of the 3.3V, 300mA Linear Post
Regulator. It must be bypassed by at least 10µF.
SW (Bank 3): SEPIC Converter Switch. This is the drain
of the internal power switching MOSFET.
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