LTC4416-1_15 Datasheet, PDF (6/12 Pages) Linear Technology – 36V, Low Loss Dual PowerPath Controllers for Large PFETs

LTC4416/LTC4416-1
BLOCK DIAGRA
V1
9
V_S
8
E1
2
3 GND
A1
+
C1
V_REF
–
RAIL1
FIRST
ANALOG
CONTROLLER
EN2
EN1
EN1
IG(SRC)
IG(SNK)
IG(OFF)
IGFON(SNK)
8.5V
G1
10
IG1
H1
1
RAILBG
BAND-GAP
REFERENCE
VREF
V2
7
E2
4
A2
+
C2
V_REF
–
RAIL2
SECOND
ANALOG
CONTROLLER
EN2
EN1
EN2
IG(SRC)
IG(SNK)
IG(OFF)
IGFON(SNK)
8.5V
G2
6
IG2
H2
5
4416 BD
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OPERATIO
Operation can best be understood by referring to the
Block Diagram which illustrates the internal circuit blocks.
The LTC4416/LTC4416-1 are divided into three sections,
namely:
1. The channel 1 controller consisting of A1, C1, the “first
analog contoller,” the G1 drivers and the H1 output
driver.
2. The band-gap reference
3. The channel 2 controller consisting of A2, C2, the
“second analog controller,” the G2 drivers and the H2
output driver.

Each of the three sections has its own derived internal
power supply referred to as a rail. RAIL1 provides power
to the channel 1 controller. RAIL2 provides power to the
channel 2 controller. The internal RAILBG provides power
to the band-gap reference. The internal rail1 derives its
power from the higher voltage of V1 and V_S. The internal
rail2 derives its power from the higher voltage of V2 and
V_S. RAILBG derives its power from the highest voltage of
V1, V2, and V_S. All three sections share a common ground
connected to the GND pin.
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