LTC3443 Datasheet, PDF (6/16 Pages) Linear Technology – High Current Micropower 600kHz Synchronous Buck-Boost DC/DC Converter

LTC3443
PI FU CTIO S
MODE/SYNC = Low: Disable Burst Mode operation and
maintain low noise, constant frequency operation .
MODE/SYNC = External CLK : Synchronization of the
internal oscillator and Burst Mode operation disable. A
clock pulse width between 100ns and 2µs and a clock
frequency between 1.38MHz and 2.4MHz (twice the
desired frequency) is required to synchronize the IC.
f_OSC = f_SYNC/2
V_OUT (Pin 8): Output of the Synchronous Rectifier. A filter
capacitor is placed from V_OUT to GND. A ceramic bypass
capacitor is recommended as close to the V_OUT and GND
pins as possible.
PV_IN (Pin 9): Power V_IN Supply Pin. A 10µF ceramic capaci-
tor is recommended as close to the PV_IN and PGND pins
as possible
V_IN (Pin 10): Input Supply Pin. Internal V_CC for the IC.
V_C (Pin 11): Error Amp Output. A frequency compensation
network is connected from this pin to the FB pin to
compensate the loop. See the section “Compensating the
Feedback Loop” for guidelines.
FB (Pin 12): Feedback Pin. Connect resistor divider tap
here. The output voltage can be adjusted from 2.4V to
5.25V. The feedback reference voltage is typically 1.22V.
BLOCK DIAGRA
6
V_IN
2.4V TO 5.5V
PV_IN
9
+
10 ^VIN
4
SW1
SW A
5
SW2
SW D
SW B
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
+
g_m
=
1
100
k
3.2A –
AVERAGE
CURRENT LIMIT
SUPPLY
CURRENT
LIMIT
+
–0.4A
SW C
I_SENSE
AMP
PGND
THERMAL
SHUTDOWN
4A –
V_CC
INTERNAL
+
UVLO
PWM
LOGIC
AND
OUTPUT
PHASING
PWM
COMPARATORS
REVERSE
CURRENT
LIMIT
CLAMP
MODE
ERROR
AMP
CLAMP
2.4V
–
V_OUT
8
1.22V
FB
12
V_OUT
2.4V TO 5.25V
R1
600kHz
OSC
SYNC
÷2
MODE/SYNC
7
1 = Burst Mode
OPERATION
0 = FIXED FREQUENCY
SLEEP
Burst Mode
OPERATION
CONTROL
5µs DELAY
SHUTDOWN
GND
2
PGND
6
V_C
11
R2
SHDN/SS
1
R_SS
V_IN
C_SS
3443 BD
sn3443 3443fs