LTC485_06 Datasheet, PDF (5/12 Pages) Linear Technology – Low Power RS485 Interface Transceiver

UU U
PI FU CTIO S
RO (Pin 1): Receiver Output. If the receiver output is
enabled(RE low), then if A > B by 200mV, RO will be high.
If A < B by 200mV, then RO will be low.
RE (Pin 2): Receiver Output Enable. A low enables the
receiver output, RO. A high input forces the receiver
output into a high impedance state.
DE (Pin 3): Driver Outputs Enable. A high on DE enables
the driver output. A and B, and the chip will function as a
line driver. A low input will force the driver outputs into a
high impedance state and the chip will function as a line
receiver.
LTC485
DI (Pin 4): Driver Input. If the driver outputs are enabled
(DE high), then a low on DI forces the outputs A low and
B high. A high on DI with the driver outputs enabled will
force A high and B low.
GND (Pin 5): Ground Connection.
A (Pin 6): Driver Output/Receiver Input.
B (Pin 7): Driver Output/Receiver Input.
V_CC (Pin 8): Positive Supply; 4.75 < V_CC < 5.25.
TEST CIRCUITS
A
R
V_OD
R
V_OC
B
LTC485 • F01
Figure 1. Driver DC Test Load
3V
DE
A
DI
B
R_DIFF
A
C_L1
B
C_L2
RO
RE
15pF
LTC485 • F03
Figure 3. Driver/Receiver Timing Test Circuit
TEST POINT
S1
RECEIVER
OUTPUT
C_RL
15pF
1k
S2
1k
V_CC
LTC485 • F02
Figure 2. Receiver Timing Test Load
OUTPUT
UNDER TEST
500Ω
C_L
S1
V_CC
S2
LTC485 • F02
Figure 4. Driver Timing Test Load #2
UW
W
SWITCHI G TI E WAVEFOR S
3V
DI
0V
B
A
V_O
0V
– V_O
1.5V
f = 1MHz, t_r ≤ 10ns, t_f ≤ 10ns
t _PLH
V_O
1/2 V_O
10%
t_r
t_SKEW
80%
V_DIFF = V(A) – V(B)
1.5V
t _PLH
1/2 V_O
t _SKEW
90%
20%
t_f
Figure 5. Driver Propagation Delays
LTC485 • F05
sn 485LTC485ffs
5