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LTC3225 Datasheet, PDF (5/12 Pages) Linear Technology – 150mA Supercapacitor Charger
LTC3225
PIN FUNCTIONS
C+ (Pin 1): Flying Capacitor Positive Terminal. A 1μF X5R
or X7R ceramic capacitor should be connected from C+
to C–.
C– (Pin 2): Flying Capacitor Negative Terminal.
CX (Pin 3): Midpoint of Two Series Supercapacitors. This
pin voltage is monitored and forced to track COUT (CX =
COUT/2) during charging to achieve voltage balancing of
the top and bottom supercapacitors.
SHDN (Pin 4): Active Low Shutdown Input. A low on SHDN
puts the LTC3225 in low current shutdown mode. Do not
float the SHDN pin.
PGOOD (Pin 5): Open-Drain Output Status Indicator. Upon
start-up, this open-drain pin remains low until the output
voltage, VOUT, is within 6% (typical) of its final value. Once
VOUT is valid, PGOOD becomes Hi-Z. If VOUT falls 7.2%
(typical) below its correct regulation level, PGOOD is
pulled low. PGOOD may be pulled up through an external
resistor to an appropriate reference level. This pin is Hi-Z
in shutdown mode.
VSEL (Pin 6): Output Voltage Selection Input. A logic low
at VSEL sets the regulated COUT to 4.8V; a logic high sets
the regulated COUT to 5.3V. Do not float the VSEL pin.
PROG (Pin 7): Charging Current Programming Pin. A resis-
tor connected between this pin and GND sets the charging
current. (See Applications Information section).
GND (Pin 8): Charge Pump Ground. This pin should be
connected directly to a low impedance ground plane.
VIN (Pin 9): Power Supply for the LTC3225. VIN should
be bypassed to GND with a low ESR ceramic capacitor of
more than 2.2μF.
COUT (Pin 10): Charge Pump Output Pin. Connect COUT
to the top plate of the top supercapacitor. COUT provides
charge current to the supercapacitors and regulates the
final voltage to 4.8V/5.3V.
Exposed Pad (Pin 11): This pad must be soldered to
a low impedance ground plane for optimum thermal
performance.
3225f
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