LTC2411 Datasheet, PDF (5/40 Pages) Linear Technology – 24-Bit No Latency ADC with Differential Input and Reference in MSOP

LTC2411/LTC2411-1
WU
TI I G CHARACTERISTICS The q denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T_A = 25°C. (Note 3)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
f_EOSC
External Oscillator Frequency Range
q 2.56
2000
kHz
t_HEO
External Oscillator High Period
t_LEO
External Oscillator Low Period
q 0.25
q 0.25
390
µs
390
µs
t_CONV
Conversion Time
F_O = 0V (LTC2411)
F_O = V_CC (LTC2411)
F_O = 0V (LTC2411-1)
External Oscillator (Note 11)
q 130.86 133.53 136.20
ms
q 157.03 160.23 163.44
ms
q 143.78 146.71 149.64
ms
q
20510/f_EOSC (in kHz)
ms
f_ISCK
D_ISCK
Internal SCK Frequency
Internal SCK Duty Cycle
Internal Oscillator (LTC2411) (Note 10)
19.2
kHz
Internal Oscillator (LTC2411-1) (Note 10)
17.5
kHz
External Oscillator (Notes 10, 11)
f_EOSC/8
kHz
(Note 10)
q
45
55
%
f_ESCK
External SCK Frequency Range
(Note 9)
q
2000
kHz
t_LESCK
t_HESCK
External SCK Low Period
External SCK High Period
(Note 9)
(Note 9)
q 250
ns
q 250
ns
t_{DOUT_ISCK} Internal SCK 32-Bit Data Output Time Internal Oscillator (LTC2411) (Notes 10, 12) q 1.64
1.67
1.70
ms
Internal Oscillator (LTC2411-1) (Notes 10, 12) q 1.80
1.83
1.86
ms
External Oscillator (Notes 10, 11)
q
256/f_EOSC (in kHz)
ms
t_{DOUT_ESCK} External SCK 32-Bit Data Output Time (Note 9)
q
32/f_ESCK (in kHz)
ms
t₁
CS ↓ to SDO Low Z
t2
CS ↑ to SDO High Z
q
0
q
0
200
ns
200
ns
t3
CS ↓ to SCK ↓
(Note 10)
q
0
200
ns
t4
CS ↓ to SCK ↑
(Note 9)
q
50
ns
t_KQMAX
SCK ↓ to SDO Valid
q
220
ns
t_KQMIN
SDO Hold After SCK ↓
(Note 5)
q
15
ns
t₅
SCK Set-Up Before CS ↓
t₆
SCK Hold After CS ↓
q
50
q
ns
50
ns
Note 1: Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: V_CC = 2.7 to 5.5V unless otherwise specified.
V_REF = REF⁺ – REF^–, V_REFCM = (REF⁺ + REF^–)/2;
V_IN = IN⁺ – IN^–, V_INCM = (IN⁺ + IN^–)/2.
Note 4: F_O pin tied to GND or to V_CC or to external conversion clock
source with f_EOSC = 153600Hz unless otherwise specified.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from
a straight line passing through the actual endpoints of the transfer
curve. The deviation is measured from the center of the quantization
band.
Note 7: F_O = 0V (internal oscillator) or f_EOSC = 153600Hz ±2%
(external oscillator).
Note 8: F_O = V_CC (internal oscillator) or f_EOSC = 128000Hz ±2%
(external oscillator).
Note 9: The converter is in external SCK mode of operation such that
the SCK pin is used as digital input. The frequency of the clock signal
driving SCK during the data output is f_ESCK and is expressed in kHz.
Note 10: The converter is in internal SCK mode of operation such that
the SCK pin is used as digital output. In this mode of operation the
SCK pin has a total equivalent load capacitance C_LOAD = 20pF.
Note 11: The external oscillator is connected to the F_O pin. The external
oscillator frequency, f_EOSC, is expressed in kHz.
Note 12: The converter uses the internal oscillator.
F_O = 0V or F_O = V_CC.
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
Note 15: F_O = 0V (internal oscillator) or f_EOSC = 139800Hz ±2%
(external oscillator).
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