LTC2143-12_15 Datasheet, PDF (4/38 Pages) Linear Technology – 12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs

LTC2145-12/
LTC2144-12/LTC2143-12
CONVERTER CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. (Note 5)
LTC2145-12
LTC2144-12
LTC2143-12
PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Resolution (No Missing Codes)
l 12
12
12
Bits
Integral Linearity Error
Differential Analog Input (Note 6) l –0.9 ±0.3 0.9 –0.9 ±0.3 0.9 –0.9 ±0.3 0.9
LSB
Differential Linearity Error
Differential Analog Input
l –0.5 ±0.1 0.5 –0.5 ±0.1 0.5 –0.5 ±0.1 0.5
LSB
Offset Error
(Note 7)
l –9 ±1.5 9 –9 ±1.5 9 –9 ±1.5 9
mV
Gain Error
Internal Reference
External Reference
±1.5
±1.5
±1.5
%FS
l –2.1 –0.5 0.8 –1.7 –0.3 1.1 –1.7 –0.3 1.1
%FS
Offset Drift
±10
±10
±10
μV/°C
Full-Scale Drift
Internal Reference
External Reference
±30
±30
±30
ppm/°C
±10
±10
±10
ppm/°C
Gain Matching
±0.2
±0.2
±0.2
%FS
Offset Matching
±1.5
±1.5
±1.5
mV
Transition Noise
0.31
0.32
0.30
LSB_RMS
ANALOG INPUT The l denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T_A = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V_IN
V_IN(CM)
V_SENSE
I_INCM
I_IN1
I_IN2
I_IN3
t_AP
t_JITTER
CMRR
Analog Input Range (A_IN+ – A_IN–)
1.7V < V_DD < 1.9V
l
Analog Input Common Mode (A_IN+ + A_IN–)/2 Differential Analog Input (Note 8) l
External Voltage Reference Applied to SENSE External Reference Mode
l
Analog Input Common Mode Current
Per Pin, 125Msps
Per Pin, 105Msps
Per Pin, 80Msps
Analog Input Leakage Current (No Encode) 0 < A_IN+, A_IN– < V_DD
l
PAR/SER Input Leakage Current
0 < PAR/SER < V_DD
l
SENSE Input Leakage Current
0.625 < SENSE < 1.3V
l
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Jitter
Single-Ended Encode
Differential Encode
Analog Input Common Mode Rejection Ratio
0.7
0.625
–1.5
–3
–3
1 to 2
V_CM
1.250
155
130
100
0
0.08
0.10
80
1.25
1.300
1.5
3
3
V_P-P
V
V
μA
μA
μA
μA
μA
μA
ns
ps_RMS
ps_RMS
dB
BW-3B Full-Power Bandwidth
Figure 6 Test Circuit
750
MHz
4
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