LTC1743 Datasheet, PDF (4/24 Pages) Linear Technology – 12-Bit, 50Msps ADC

LTC1743
DIGITAL I PUTS A D DIGITAL OUTPUTS The q indicates specifications which apply over the full
operating temperature range, otherwise specifications are at T_A = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
V_IH
High Level Input Voltage
V_DD = 5.25V
q 2.4
V
V_IL
Low Level Input Voltage
V_DD = 4.75V
q
0.8
V
I_IN
Digital Input Current
V_IN = 0V to V_DD
q
±10
µA
C_IN
Digital Input Capacitance
MSBINV and OE Only
1.5
pF
V_OH
High Level Output Voltage
OV_DD = 4.75V
I_O = –10µA
4.74
V
I_O = – 200µA q 4
V
V_OL
Low Level Output Voltage
OV_DD = 4.75V
I_O = 160µA
0.05
V
I_O = 1.6mA q
0.1
0.4
V
I_OZ
Hi-Z Output Leakage D11 to D0
V_OUT = 0V to V_DD, OE = High
q
±10
µA
C_OZ
Hi-Z Output Capacitance D11 to D0
OE = High (Note 8)
q
15
pF
I_SOURCE Output Source Current
V_OUT = 0V
– 50
mA
I_SINK
Output Sink Current
V_OUT = 5V
50
mA
POWER REQUIRE E TS The q indicates specifications which apply over the full operating temperature
range, otherwise specifications are at T_A = 25°C. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
V_DD
Positive Supply Voltage
4.75
5.25
V
I_DD
Positive Supply Current
q
200
240
mA
P_DIS
Power Dissipation
q
1000
1200
mW
OV_DD
Digital Output Supply Voltage
WU
TI I G CHARACTERISTICS
0.5
V_DD
V
The q indicates specifications which apply over the full operating temperature
range, otherwise specifications are at T_A = 25°C. (Note 5)
SYMBOL
f_SAMPLE(MAX)
t₁
t₂
t₃
t₄
t₅
t₆
t₇
t₈
PARAMETER
Maximum Sampling Frequency
ENC Low Time
ENC High Time
Aperture Delay of Sample-and-Hold
ENC to Data Delay
ENC to CLKOUT Delay
CLKOUT to Data Delay
DATA Access Time After OE ↓
BUS Relinquish Time
CONDITIONS
(Note 9)
(Note 9)
C_L = 10pF (Note 8)
C_L = 10pF (Note 8)
C_L = 10pF (Note 8)
C_L = 10pF (Note 8)
(Note 8)
MIN
q 50
q 9.5
q 9.5
q 1.4
q 0.5
q0
TYP
MAX UNITS
MHz
10
1000
ns
10
1000
ns
0
ns
4.5
8
ns
2.3
5
ns
2.2
ns
10
25
ns
10
25
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with GND
(unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above V_DD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V_DD without latchup.
Note 4: When these pin voltages are taken below GND, they will be
clamped by internal diodes. This product can handle input currents of
>100mA below GND without latchup. These pins are not clamped to V_DD.
Note 5: V_DD = 5V, f_SAMPLE = 50MHz, differential ENC/ENC = 2V_P-P 50MHz
sine wave, input range = ±1.6V differential, unless otherwise specified.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: Bipolar offset is the offset voltage measured from – 0.5 LSB
when the output code flickers between 0000 0000 0000 and 1111 1111
1111.
Note 8: Guaranteed by design, not subject to test.
Note 9: Recommended operating conditions.
1743f
4