LTC1605ACG Datasheet, PDF (4/16 Pages) Linear Technology – 16-Bit, 100ksps, Sampling ADC

LTC1605
DIGITAL INPUTS AND DIGITAL OUTPUTS The ● denotes specifications which apply over the full
operating temperature range, otherwise specifications are at T_A = 25°C. (Note 5)
SYMBOL PARAMETER
V_OL
Low Level Output Voltage
I_OZ
C_OZ
I_SOURCE
I_SINK
Hi-Z Output Leakage D15 to D0
Hi-Z Output Capacitance D15 to D0
Output Source Current
Output Sink Current
CONDITIONS
V_DD = 4.75V
V_OUT = 0V to V_DD, CS High
CS High (Note 9)
V_OUT = 0V
V_OUT = V_DD
I_O = 160µA
I_O = 1.6mA
LTC1605/LTC1605A
MIN
TYP
MAX
0.05
●
0.10
0.4
●
±10
●
15
–10
10
UNITS
V
V
µA
pF
mA
mA
TIM ING CHARACTERISTICS ^{The ● denotes specifications which apply over the full operating temperature}
range, otherwise specifications are at T_A = 25°C. (Note 5)
SYMBOL
f_SAMPLE(MAX)
t_CONV
t_ACQ
t₁
t₂
t₃
t₄
t₅
t₆
t₇
t₈
t₉
t₁₀
t₁₁
t₁₂
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time
Convert Pulse Width
Data Valid Delay After R/C↓
BUSY Delay from R/C↓
BUSY Low
BUSY Delay After End of Conversion
Aperture Delay
Bus Relinquish Time
BUSY Delay After Data Valid
Previous Data Valid After R/C↓
R/C to CS Setup Time
Time Between Conversions
Bus Access and Byte Delay
CONDITIONS
(Note 11)
(Note 9)
C_L = 50pF
(Notes 9, 10)
(Notes 9, 10)
LTC1605/LTC1605A
MIN
TYP
MAX
● 100
●
8
●
2
● 40
●
8
●
65
8
220
40
● 10
35
83
● 50
200
7.4
10
10
10
83
UNITS
kHz
µs
µs
ns
µs
ns
µs
ns
ns
ns
ns
µs
ns
µs
ns
POWER REQUIREMENTS The ● denotes specifications which apply over the full operating temperature range,
otherwise specifications are at T_A = 25°C. (Note 5)
SYMBOL
V_DD
I_DD
P_DIS
PARAMETER
Positive Supply Voltage
Positive Supply Current
Power Dissipation
CONDITIONS
(Notes 9, 10)
LTC1605/LTC1605A
MIN
TYP
MAX
4.75
5.25
●
11
16
55
80
UNITS
V
mA
mW
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with DGND, AGND1
and AGND2 wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below ground or above V_ANA =
V_DIG = V_DD, they will be clamped by internal diodes. This product can
handle input currents of greater than 100mA below ground or above V_DD
without latch-up.
4
Note 4: When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
90mA below ground without latchup. These pins are not clamped to V_DD.
Note 5: V_DD = 5V, f_SAMPLE = 100kHz, t_r = t_f = 5ns unless otherwise
specified.
Note 6: Linearity, offset and full-scale specifications apply for a V_IN input
with respect to ground.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
1605fc