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LT1028_01 Datasheet, PDF (4/20 Pages) Linear Technology – Ultralow Noise Precision High Speed Op Amps
LT1028/LT1128
ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the temperature range
0°C ≤ TA ≤ 70°C. VS = ±15V, unless otherwise noted.
LT1028AC
LT1128AC
LT1028C
LT1128C
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX
UNITS
VOS
Input Offset Voltage
(Note 2)
q
15 80
30 125
µV
∆VOS Average Input Offset Drift
∆Temp
(Note 8)
q
0.1 0.8
0.2 1.0
µV/°C
IOS
Input Offset Current
VCM = 0V
q
15 65
22 130
nA
IB
Input Bias Current
VCM = 0V
q
±30 ±120
±40 ±240
nA
Input Voltage Range
q ±10.5 ±12.0
±10.5 ±12.0
V
CMRR Common Mode Rejection Ratio
VCM = ±10.5V
q 110 124
106 124
dB
PSRR Power Supply Rejection Ratio
VS = ±4.5V to ±18V
q 114 132
107 132
dB
AVOL Large-Signal Voltage Gain
RL ≥ 2k, VO = ±10V
q 5.0 25.0
3.0 25.0
V/µV
RL ≥ 1k, VO = ±10V
4.0 18.0
2.5 18.0
V/µV
VOUT Maximum Output Voltage Swing
RL ≥ 2k
q ±11.5 ±12.7
±11.5 ±12.7
V
RL ≥ 600Ω (Note 10)
±9.5 ±11.0
±9.0 ±10.5
V
IS
Supply Current
q
8.0 10.5
8.2 11.5
mA
ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the temperature range
– 40°C ≤ TA ≤ 85°C. VS = ±15V, unless otherwise noted. (Note 11)
LT1028AC
LT1128AC
LT1028C
LT1128C
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX
UNITS
VOS
∆VOS
∆Temp
Input Offset Voltage
Average Input Offset Drift
(Note 8)
q
20 95
q
0.2 0.8
35 150
0.25 1.0
µV
µV/ °C
IOS
Input Offset Current
IB
Input Bias Current
Input Voltage Range
VCM = 0V
VCM = 0V
q
20 80
28 160
nA
q
±35 ±140
±45 ±280
nA
q ±10.4 ±11.8
±10.4 ±11.8
V
CMRR
PSRR
AVOL
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT Maximum Output Voltage Swing
IS
Supply Current
VCM = ±10.5V
VS = ±4.5V to ±18V
RL ≥ 2k, VO = ±10V
RL ≥ 1k, VO = ±10V
RL ≥ 2k
q 108 123
102 123
dB
q 112 131
106 131
dB
q 4.0 20.0
2.5 20.0
V/µV
3.0 14.0
2.0 14.0
V/µV
q ±11.0 ±12.5
±11.0 ±12.5
V
q
8.5 11.0
8.7 12.5
mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Input Offset Voltage measurements are performed by automatic
test equipment approximately 0.5 sec. after application of power. In
addition, at TA = 25°C, offset voltage is measured with the chip heated to
approximately 55°C to account for the chip temperature rise when the
device is fully warmed up.
Note 3: Long Term Input Offset Voltage Stability refers to the average
trend line of Offset Voltage vs. Time over extended periods after the first
30 days of operation. Excluding the initial hour of operation, changes in
VOS during the first 30 days are typically 2.5µV.
Note 4: This parameter is tested on a sample basis only.
on an RMS basis) is divided by the sum of the two source resistors to
obtain current noise. Maximum 10Hz current noise can be inferred from
100% testing at 1kHz.
Note 7: Gain-bandwidth product is not tested. It is guaranteed by design
and by inference from the slew rate measurement.
Note 8: This parameter is not 100% tested.
Note 9: The inputs are protected by back-to-back diodes. Current-limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds ±1.8V, the input current should be limited to 25mA.
Note 10: This parameter guaranteed by design, fully warmed up at TA =
70°C. It includes chip temperature increase due to supply and load
currents.
Note 5: 10Hz noise voltage density is sample tested on every lot with the
exception of the S8 and S16 packages. Devices 100% tested at 10Hz are
available on request.
Note 6: Current noise is defined and measured with balanced source
resistors. The resultant voltage noise (after subtracting the resistor noise
Note 11: The LT1028/LT1128 are designed, characterized and expected to
meet these extended temperature limits, but are not tested at –40°C and
85°C. Guaranteed I grade parts are available. Consult factory.
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