LTC2000_15 Datasheet, PDF (33/52 Pages) Linear Technology – 16-/14-/11-Bit 2.5Gsps DACs

LTC2000
SPI Register Summary
Table 11. SPI Register List
ADDRESS
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
BIT
NAME
DESCRIPTION
[7:0] Reserved Reserved
0 SW_RST Software Reset. SW_RST = 1 resets all registers.
1
DAC_PD DAC Power Down. DAC_PD = 1 to power down DAC core.
2 FULL_PD Full Power Down. FULL_PD = 1 to power down LTC2000.
3 Reserved Reserved
[5:4] DAC_RES DAC Resolution Indicator. DAC_RES = 00 for LTC2000-16. DAC_RES = 01 for LTC2000-14.
DAC_RES = 11 for LTC2000-11. Note that for PD = GND or FULL_PD = 1, DAC_RES = 00.
DAC_RES is read only.
[7:6] Reserved Reserved
0
CK_PD CKP/N Clock Receiver Power Down. CK_PD = 1 disables
1
CK_OK CKP/N Clock Present Indicator. CK_OK = 1 clock present
[3:2] Reserved Reserved
4 DCKO_DIS DCKOP/N Output Disable. DCKO_DIS = 1 disables
5 DCKO_DIV DCKOP/N Divide Select. (0 = f_DAC/4, 1 = f_DAC/2).
6 DCKO_ISEL DCKOP/N Output Current Select. (0=3.5mA, 1 = 7mA)
7 DCKO_TRM DCKOP/N Internal Termination On. DCKO_TRM = 1 enables internal 100Ω termination
0 DCKI_EN DCKIP/N Clock Receiver Enable. DCKI_EN = 1 enables.
1 DCKI_OK DCKIP/N Clock Present Indicator. DCKI_OK = 1 indicates clock present
2
DCKI_Q DCKIP/N Quadrature Phase Select. (0 = In Phase, 1 = Quadrature)
3 Reserved Reserved
[6:4] DCKI_TADJ DCKIP/N Delay Adjust. (See Table 4)
7 Reserved Reserved
0
DA_EN Port A LVDS Receiver Enable. DA_EN = 1 to enable
1
DB_EN Port B LVDS Receiver Enable. DB_EN = 1 to enable
2 DATA_SP Port Mode Select. (0 = Dual port, 1 = Single port)
3 DATA_EN DAC Data Enable. DATA_EN = 0 forces DAC output to mid-scale.
[7:4] Reserved Reserved
[1:0] SYNC_PS Clock Synchronizer Phase Select.
2 SYNC_MSYN Clock Synchronizer Manual Mode Select.
SYNC_MSYN = 0: SYNC_PS is set automatically.
SYNC_MSYN = 1: SYNC_PS is set by the user.
[7:3] Reserved Reserved
[7:0] SYNC_PH Clock Phase Comparator Outputs. (See Table 6)
0
LIN_DIS Dynamic Linearization Disable. LIN_DIS = 1 disables.
[3:1] LIN_GN Dynamic Linearization Gain Select. (See Table 7)
[7:4] Reserved Reserved
[3:0] LIN_VMX Dynamic Linearization Max I_OUTP/N Voltage Select. (See Table 7)
[7:4] LIN_VMN Dynamic Linearization Min I_OUTP/N Voltage Select. (See Table 7)
RESET
VALUE R/W
0
R/W
0
R/W
0
R/W
00-16b R
01-14b
11-11b
0
R/W
0
R
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R
0
R/W
000 R/W
0
R/W
0
R/W
0
R/W
0
R/W
00 R/W
0
R/W
0x00
R
0
R/W
000 R/W
1000 R/W
0000 R/W
For more information www.linear.com/LTC2000
2000f
33