LTC6804-2_15 Datasheet, PDF (32/74 Pages) Linear Technology – Multicell Battery Monitors

LTC6804-1/LTC6804-2
Operation
Table 16. Write Codes for ICOMn[3:0] and FCOMn[3:0] on I²C Master
CONTROL BITS
ICOMn[3:0]
CODE
0110
0001
0000
ACTION
START
STOP
BLANK
DESCRIPTION
Generate a START Signal on I²C Port Followed By Data Transmission
Generate a STOP Signal on I²C port
Proceed Directly to Data Transmission on I²C Port
0111 No Transmit
Release SDA and SCL and Ignore the Rest of the Data
0000 Master ACK
Master Generates an ACK Signal on Ninth Clock Cycle
FCOMn[3:0]
1000 Master NACK
Master Generates a NACK Signal on Ninth Clock Cycle
1001 Master NACK + STOP
Master Generates a NACK Signal Followed by STOP Signal
Table 17. Write Codes for ICOMn[3:0] and FCOMn[3:0] on SPI Master
CONTROL BITS CODE ACTION
DESCRIPTION
1000 CSBM low
Generates a CSBM Low Signal on SPI Port (GPIO3)
ICOMn[3:0]
1001 CSBM high
Generates a CSBM High Signal on SPI Port (GPIO3)
1111 No Transmit
Releases the SPI Port and Ignores the Rest of the Data
FCOMn[3:0]
X000 CSBM low
1001 CSBM high
Holds CSBM Low at the End of Byte Transmission
Transitions CSBM High at the End of Byte Transmission
COMM Commands
Three commands help accomplish I²C or SPI communica-
tion to the slave device: WRCOMM, STCOMM, RDCOMM
WRCOMM Command: This command is used to write data
to the COMM register. This command writes 6 bytes of
data to the COMM register. The PEC needs to be written
at the end of the data. If the PEC does not match, all data
in the COMM register is cleared to 1’s when CSB goes
high. See the section Bus Protocols for more details on a
write command format.
STCOMM Command: This command initiates I²C/SPI com-
munication on the GPIO ports. The COMM register contains
3 bytes of data to be transmitted to the slave. During this
command, the data bytes stored in the COMM register are
transmitted to the slave I²C or SPI device and the data
received from the I²C or SPI device is stored in the COMM
register. This command uses GPIO4 (SDA) and GPIO5
(SCL) for I²C communication or GPIO3 (CSBM), GPIO4
(SDIOM) and GPIO5 (SCKM) for SPI communication.
The STCOMM command is to be followed by 24 clock
cycles for each byte of data to be transmitted to the slave
device while holding CSB low. For example, to transmit 3
bytes of data to the slave, send STCOMM command and
its PEC followed by 72 clock cycles. Pull CSB high at the
end of the 72 clock cycles of STCOMM command.
During I²C or SPI communication, the data received from
the slave device is updated in the COMM register.
RDCOMM Command: The data received from the slave
device can be read back from the COMM register using the
RDCOMM command. The command reads back 6 bytes of
data followed by the PEC. See the section Bus Protocols
for more details on a read command format.
Table 18 describes the possible read back codes for
ICOMn[3:0] and FCOMn[3:0] when using the part as an I²C
master. Dn[7:0] contains the data byte either transmitted
by the I²C master or received from the I²C slave.
In case of the SPI master, the read back codes for
ICOMn[3:0] and FCOMn[3:0] are always 0111 and 1111
respectively. Dn[7:0] contains the data byte either trans-
mitted by the SPI master or received from the SPI slave.
Figure 11 illustrates the operation of LTC6804 as an I²C
or SPI master using the GPIOs.
Any number of bytes can be transmitted to the slave in
groups of 3 bytes using these commands. The GPIO ports
will not get reset between different STCOMM commands.
However, if the wait time between the commands is greater
than 2 seconds, the watchdog will timeout and reset the
ports to their default values.
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