LTC2408_15 Datasheet, PDF (32/36 Pages) Linear Technology – 4-/8-Channel 24-Bit Power No Latency ADCs

LTC2404/LTC2408
APPLICATIONS INFORMATION
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*
*
* This example program loads multiplexer channels selection data into
*
* either the LTC2408’s internal MUX or an external LTC1391 MUX. It then
*
* transfers the LTC2408’s 32-bit output conversion result to four
*
* consecutive 8-bit memory locations.
*
*
*
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*
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* 68HC11 register definitions
*
***************************************
*
PORTD EQU
$1008 Port D data register
*
“ - , - , SS* ,CSK ;MOSI,MISO,TxD ,RxD “
DDRD EQU
$1009 Port D data direction register
SPCR EQU
$1028 SPI control register
*
“SPIE,SPE ,DWOM,MSTR;SPOL,CPHA,SPR1,SPR0”
SPSR EQU
$1029 SPI status register
*
“SPIF,WCOL, - ,MODF; - , - , - , - “
SPDR EQU
$102A SPI data register; Read-Buffer; Write-Shifter
*
* RAM variables to hold the LTC2408’s 32 conversion result
*
DIN1
EQU
$00
This memory location holds the LTC2408’s bits 31 - 24
DIN2
EQU
$01
This memory location holds the LTC2408’s bits 23 - 16
DIN3
EQU
$02
This memory location holds the LTC2408’s bits 15 - 08
DIN4
EQU
$03
This memory location holds the LTC2408’s bits 07 - 00
MUX
EQU
$04
This memory location holds the MUX address data
*
***************************************
* Start GETDATA Routine
*
***************************************
*
ORG
$C000 Program start location
INIT1
LDAA #$2F
-,-,1,0;1,1,1,1
*
-, -, SS*-Hi, SCK-Lo, MOSI-Hi, MISO-Hi, X, X
STAA PORTD Keeps SS* a logic high when DDRD, bit 5 is set
LDAA #$38
-,-,1,1;1,0,0,0
STAA DDRD SS* , SCK, MOSI are configured as Outputs
*
MISO, TxD, RxD are configured as Inputs
* DDRD’s bit 5 is a 1 so that port D’s SS* pin is a general output
LDAA #$50
STAA SPCR The SPI is configured as Master, CPHA = 0, CPOL = 0
*
and the clock rate is E/2
*
(This assumes an E-Clock frequency of 4MHz. For higher
*
E-Clock frequencies, change the above value of $50 to a
*
value that ensures the SCK frequency is 2MHz or less.)
GETDATA PSHX
PSHY
PSHA
LDX
#$0
The X register is used as a pointer to the memory
*
locations that hold the conversion data
LDY
#$1000
*
***************************************
* The next routine sends data to the
*
* LTC2408 an sets its MUX channel
*
***************************************
*
LDAA MUX
Retrieve MUX address
TAB
Save contents of Accum. A
SUBA #$07
Is the MUX address in the low nibble
BLE
ENLWMX If it is, branch to enable the LTC2408’s internal MUX
TBA
Restore contents of Accum. A
ORAA #$80
Enable the LTC1391 external MUX
BRA
MUXSPI Go to SPI transfer2400
32