LTC1703IG Datasheet, PDF (30/36 Pages) Linear Technology – Dual 550kHz Synchronous 2-Phase Switching Regulator Controller with 5-Bit VID

LTC1703
APPLICATIO S I FOR ATIO
capacitors and/or paralleling multiple capacitors at the
output. The capacitance value accounts for the rest of the
voltage drop until the inductor current rises. With most
output capacitors, several devices paralleled to get the
ESR down will have so much capacitance that this drop
term is negligible. Ceramic capacitors are an exception; a
small ceramic capacitor can have suitably low ESR with
relatively small values of capacitance, making this second
drop term significant.
Optimizing Loop Compensation
Loop compensation has a fundamental impact on tran-
sient recovery time, the time it takes the LTC1703 to
recover after the output voltage has dropped due to output
capacitor ESR. Optimizing loop compensation entails
maintaining the highest possible loop bandwidth while
ensuring loop stability. The Feedback Component Selec-
tion section describes in detail how to design an optimized
feedback loop, appropriate for most LTC1703 systems.
Voltage Positioning
If the load transients consist primarily of load steps from
near zero load to full load and back, the transient response
can be traded off against DC regulation performance by
using a technique known as “voltage positioning.” The
goal is to intentionally compromise the DC regulation loop
such that the output rides near the maximum allowable
value (often +5%) with no load and near the minimum
allowable value at maximum load. With the load at zero,
any transient that comes along will be a current increase
which will cause the output voltage to fall. Since the output
voltage is initially at a high value, it can fall further before
it goes out of spec. Similarly, at full load, the output current
can only decrease, causing a positive shift in the output
voltage; the initial low value allows it to rise further before
the spec is exceeded. The primary benefit of voltage
positioning is it increases the allowable ESR of the output
capacitors, saving cost. An additional bonus is that at
maximum load, the output voltage is near the minimum
allowable, decreasing the power dissipated in the load.
Implementing voltage positioning is as simple as creating
an intentional resistance in the output path to generate the
required voltage drop. This resistance can be a low value
resistor, a length of PCB trace, or even the parasitic
resistance of the inductor if an appropriate filter is used. If
the LTC1703 senses the output voltage upstream from the
resistance (Figure 17c), the output voltage will move with
load as I • R_VP, where I is the load current and R_VP is the
value of the voltage positioning resistor. If the feedback
network is then reset to regulate near the upper edge of the
V_IN
LTC1703
FB
V_OUT
1703 F17a
+5%
V_OUT NOM
–5%
MAX
LOAD
CURRENT
0
MAXIMUM
ALLOWABLE
TRANSIENT
1703 F17b
Figure 17a. Standard Regulator
V_IN
LTC1703
FB
R_VP
V_OUT
1703 F17c
Figure 17b. Standard Regulator—Transient Response
+5%
V_OUT NOM
–5%
MAX
LOAD
CURRENT
0
MAXIMUM
ALLOWABLE
TRANSIENT
≈2× FIGURE 17b
1703 F17d
Figure 17c. Voltage Positioning Regulator
30
Figure 17d. Positioning Regulator—Transient Response
1703fa