RH1056A_15 Datasheet, PDF (3/4 Pages) Linear Technology – Precision, High Speed, JFET Input Operational Amplifier

RH1056A
TABLE 1A: ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Unless otherwise specified, the absolute maximum negative input
voltage is equal to the negative power supply voltage. Offset voltage is
measured under two different conditions: (a) approximately 0.5 seconds
after application of power, (b) at T_A = 25°C only, with the chip heated to
approximately 45°C to account for chip temperature rise when the device
is fully warmed up.
Note 3: Unless otherwise stated, V_S = ± 15V; and V_OS, I_B and I_OS are
measured at V_CM = 0V.
Note 4: The input bias currents are junction leakage currents which
approximately double for every 10°C increase in the junction temperature,
T_J. Due to limited production test time, the input bias currents measured
are correlated to junction temperature. In normal operation the junction
temperature rises above the ambient temperature as a result of internal
power dissipation, P_D. T_J = T_A + (θ_JA • P_D) where θ_JA is the thermal
resistance from junction to ambient.
Note 5: Unless otherwise stated, V_S = ±15V, V_CM = 0V and T_A = 25°C.
TABLE 2: ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
Final Electrical Test Requirements (Method 5004)
Group A Test Requirements (Method 5005)
Group B and D for Class S, and
Class C and D for Class B**
End Point Electrical Parameters (Method 5005)
*PDA applies to subgroup 1. See PDA Test Notes.
**For D3, D4, B5 and B6 V_OS Limit as follows
SUBGROUP
1*,2,3,4,5,6, 7
1,2,3,4,5,6, 7
1
W Package
500μV
H Package
700μV
PDA Test Notes
The PDA is specified as 5% based on failures from group A, subgroup 1,
tests after cooldown as the final electrical test in accordance with method
5004 of MIL-STD-883. The verified failures of group A, subgroup 1, after
burn-in divided by the total number of devices submitted for burn-in in
that lot shall be used to determine the percent for the lot.
Linear Technology Corporation reserves the right to test to tighter limits
than those given.
TOTAL DOSE BIAS CIRCUIT
10k
15V
2– ₇
8V ^{10k 3 +}
4
–15V
0.1μF
6
0.1μF
RH1056A BC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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