RH1056A Datasheet, PDF (3/4 Pages) Linear Technology – Precision, High Speed, JFET Input Operational Amplifier

RH1056A
TABLE 1A: ELECTRICAL CHARACTERISTICS (Postirradiation) (Note 4)
SYMBOL PARAMETER
CONDITIONS
V_OS
Input Offset Voltage
I_OS
Input Offset Current
I_B
Input Bias Current
A_VOL Large-Signal
Voltage Gain
V_O = ±10V, R_L ≥ 2k
V_O = ±10V, R_L ≥ 1k
V_O
Output Voltage Swing R_L ≥ 2k
V_CM
Input Common Mode V_S = ±15V
Voltage Range
CMRR Common Mode
Rejection Ratio
V_CM = ±11V
PSRR Power Supply
Rejection Ratio
V_S = ±10V to ±18V
I_S
Supply Current
SR
Slew Rate
A_V = 1, V_S = ±15V
C_IN
Input Capacitance
10KRAD(Si) 25KRAD(Si) 50KRAD(Si) 100KRAD(Si) 200KRAD(Si)
NOTES MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1
300
300
370
570
570 µV
3
±10
±50
±150
±250
±350 pA
3
±50
±250
±500
±1000
±2000 pA
150
150
150
100
75
V/mV
130
130
130
87
65
V/mV
±12
±12
±12
±12
±12
V
±11
±11
±11
±11
±11
V
86
86
86
86
86
dB
90
90
90
90
90
dB
7
7
7
7
7 mA
12
12
12
12
12
V/µs
3(Typ)
3(Typ)
3(Typ)
3(Typ)
3(Typ)
pF
Note 1: Unless otherwise specified, the absolute maximum negative input
voltage is equal to the negative power supply voltage. Offset voltage is
measured under two different conditions: (a) approximately 0.5 seconds
after application of power, (b) at T_A = 25°C only, with the chip heated to
approximately 45°C to account for chip temperature rise when the device
is fully warmed up.
Note 2: Unless otherwise stated, V_S = ±15V; and V_OS, I_B and I_OS are
measured at V_CM = 0V.
Note 3: The input bias currents are junction leakage currents which
approximately double for every 10°C increase in the junction temperature,
T_J. Due to limited production test time, the input bias currents measured
are correlated to junction temperature. In normal operation the junction
temperature rises above the ambient temperature as a result of internal
power dissipation, P_D. T_J = T_A + (θ_JA • P_D) where θ_JA is the thermal
resistance from junction to ambient.
Note 4: Unless otherwise stated, V_S = ±15V, V_CM = 0V and T_A = 25°C.
TABLE 2: ELECTRICAL TEST REQUIRE E TS
MIL-STD-883 TEST REQUIREMENTS
Final Electrical Test Requirements (Method 5004)
Group A Test Requirements (Method 5005)
Group B and D for Class S, and
Class C and D for Class B
End Point Electrical Parameters (Method 5005)
* PDA applies to subgroup 1. See PDA Test Notes.
SUBGROUP
1*,2,3,4,5,6,7
1,2,3,4,5,6,7
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PDA Test Notes
The PDA is specified as 5% based on failures from group A, subgroup 1,
tests after cooldown as the final electrical test in accordance with method
5004 of MIL-STD-883. The verified failures of group A, subgroup 1, after
burn-in divided by the total number of devices submitted for burn-in in
that lot shall be used to determine the percent for the lot.
Linear Technology Corporation reserves the right to test to tighter limits
than those given.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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