LTC3542_15 Datasheet, PDF (3/16 Pages) Linear Technology – 500mA, 2.25MHz Synchronous Step-Down DC/DC Converter

LTC3542
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. V_IN = 3.6V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
I_S
Input DC Supply Current (Note 5)
Active Mode
V_FB = 0.5V
Sleep Mode
V_FB = 0.7V, MODE = 0V
Shutdown
RUN = 0V
500
μA
26
35
μA
0.1
1
μA
f_OSC
Oscillator Frequency
V_FB = 0.6V
● 1.8
2.25
2.7
MHz
f_SYNC
Synchronous Frequency
V_FB = 0.6V
1
3
MHz
I_LIM
Peak Switch Current
V_IN = 3V, V_FB = 0.5V, Duty Cycle < 35%
650 1000
mA
R_DS(ON)
I_SW(LKG)
P-Channel On Resistance (Note 6)
N-Channel On Resistance (Note 6)
Switch Leakage Current
I_SW = 100mA
I_SW = –100mA
V_IN = 5V, V_RUN = 0V, V_SW = 0V or 5V
0.5
0.65
Ω
0.35 0.55
Ω
±0.01 ±1
μA
V_UVLO
V_RUN
Undervoltage Lockout Threshold
RUN Threshold
V_IN Rising
V_IN Falling
2.0
2.3
V
1.8
1.9
V
● 0.3
1.5
V
I_RUN
RUN Leakage Current
●
±0.01 ±1
μA
V_MODE/SYNC
MODE/SYNC Threshold
● 0.3
1.2
V
I_MODE/SYNC
MODE/SYNC Leakage Current
●
±0.01 ±1
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. No pin should exceed 6V.
Note 2: The LTC3542 is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3542I is guaranteed over the full
–40°C to 125°C operating temperature range.
Note 3: Failure to solder the Exposed Pad of the package to the PC board
will result in a thermal resistance much higher than 102°C/W.
Note 4: The converter is tested in a proprietary test mode that connects
the output of the error amplifier to the SW pin, which is connected to an
external servo loop.
Note 5: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 6: The DFN switch on resistance is guaranteed by correlation to wafer
level measurements.
Note 7: T_J is calculated from the ambient temperature T_A and power
dissipation P_D according to the following formula:
T_J = T_A + (P_D) • (θ_JA).
TYPICAL PERFORMANCE CHARACTERISTICS T_A = 25°C unless otherwise specified.
Burst Mode Operation
SW
2V/DIV
V_OUT
50mV/DIV
AC COUPLED
I_L
100mA/DIV
V_IN = 3.6V
2μs/DIV
V_OUT = 1.8V
I_LOAD = 25mA
FIGURE 3a CIRCUIT
Pulse Skip Mode Operation
Start-Up from Shutdown
SW
2V/DIV
V_OUT
50mV/DIV
AC COUPLED
I_L
100mA/DIV
3542 G01
V_IN = 3.6V
400ns/DIV
V_OUT = 1.8V
I_LOAD = 25mA
FIGURE 3a CIRCUIT
RUN
2V/DIV
V_OUT
1V/DIV
I_L
100mA/DIV
3542 G02
V_IN = 3.6V
400μs/DIV
V_OUT = 1.8V
I_LOAD = 0A
FIGURE 3a CIRCUIT
3542 G03
3542fa
3