LTC3107_15 Datasheet, PDF (3/24 Pages) Linear Technology – Ultra-Low Voltage Energy Harvester and Primary Battery Life Extender

LTC3107
Electrical Characteristics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T_A = 25°C (Note 2). VAUX = 4V, V_BAT = 3.6V unless otherwise noted.
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Minimum Harvester Start-Up Voltage
Using 1:100 Transformer Turns Ratio
20
30
mV
Harvester No-Load Input Current
Using 1:100 Transformer Turns Ratio, V_IN = 20mV,
All Outputs Charged and in Regulation
3
5
mA
Harvester Input Voltage Range
V_BAT Voltage Range
V_BAT Current Limit
V_BAT Quiescent Current
V_BAT Reverse Current
V_OUT Voltage (Average)
LDO Output Voltage
Using 1:100 Transformer Turns Ratio
V_OUT = 0V, VAUX = 0V (Battery Insertion)
V_OUT = (V_BAT – 0.4V)
VAUX > V_BAT (Harvesting)
VAUX < V_BAT (Not Harvesting)
VAUX = 4V, V_BAT = 2.0V
VAUX > V_BAT (Harvesting), Relative to V_BAT
C_OUT ≥ 47µF
VAUX < V_BAT (Not Harvesting), Relative to V_BAT
C_OUT ≥ 47µF
0.5mA Load
l V_STARTUP
l 2.0
500
mV
4.0
V
l
2
30
60
mA
l 30
70
100
mA
80
110
nA
6
7.5
µA
0
nA
l –70
–30
–15
mV
l –270 –220 –140
mV
l 2.134 2.2 2.266
V
LDO Load Regulation
LDO Line Regulation
LDO Dropout Voltage
LDO Current Limit
I_VLDO = 0mA to 2mA
For V_OUT from 2.5V to 4V
I_VLDO = 2mA
VLDO = 0V
0.8
1.5
%
0.1
0.2
%
l
100
200
mV
l 10
20
40
mA
VAUX/VSTORE Clamp Voltage
Current Into VAUX = 1mA
l 4.13
4.3
4.48
V
V_OUT Quiescent Current
VSTORE Leakage Current
VAUX > V_OUT > V_BAT
VSTORE = 4V, VAUX > VSTORE
10
100
nA
10
100
nA
VSTORE to V_OUT Discharge Path Resistance
BAT_OFF Threshold (Falling)
BAT_OFF Threshold (Rising)
BAT_OFF V_OL
BAT_OFF V_OH
BAT_OFF Pull-Up Resistance
VSTORE = 4V
V_OUT < V_BAT –60mV
Measured on V_OUT Relative to V_BAT
Measured on V_OUT Relative to V_BAT
Sink Current = 100µA
Source Current = 0
120
200
Ω
–280 –230 –180
mV
–60
–30
–15
mV
0.15
0.2
V
V_OUT
V
0.6
1
1.4
MΩ
N-Channel MOSFET On-Resistance
C2 = 5V (Note 3)
0.5
Ω
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3107 is tested under pulsed load conditions such that T_J ≈
T_A. The LTC3107E is guaranteed to meet specifications from 0°C to 85°C
junction temperature. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization
and correlation with statistical process controls. The LTC3107I is
guaranteed over the full –40°C to 125°C operating junction temperature
range. Note that the maximum ambient temperature consistent with
these specifications, is determined by specific operating conditions
in conjunction with board layout, the rated thermal package thermal
resistance and other environmental factors. The junction temperature (T_J)
is calculated from the ambient temperature (T_A) and power dissipation
(P_D) according to the formula: T_J = T_A + (P_D • θ_JA°C/W), where θ_JA is the
package thermal impedance.
Note 3: Specification is guaranteed by design and not 100% tested in
production.
Note 4: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal resistance much higher than
43°C/W.
Note 5: The Absolute Maximum Rating is a DC rating. Under certain
conditions in the applications shown, the peak AC voltage on the C1 and
C2 pins may exceed their Absolute Maximum Rating. This behavior is
normal and acceptable because the current into the pin is limited by the
impedance of the coupling capacitor.
3107f
For more information www.linear.com/LTC3107
3