LT1055 Datasheet, PDF (3/12 Pages) Linear Technology – Precision, High Speed, JFET Input Operational Amplifiers

LT1055/LT1056
ELECTRICAL CHARACTERISTICS V_S = ±15V, V_CM = 0V, 0°C ≤ T_A ≤ 70°C unless otherwise noted.
SYMBOL PARAMETER
V_OS
Input Offset Voltage (Note1)
I_OS
I_B
A_VOL
CMRR
PSRR
V_OUT
Average Temperature
Coefficient of Input Offset
Voltage
Input Offset Current
Input Bias Current
Large-Signal Voltage Gain
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing
CONDITIONS
LT1055 H Package
LT1056 H Package
LT1055 N8 Package
LT1056 N8 Package
H Package (Note 5)
N8 Package (Note 5)
Warmed Up LT1055
T_A = 70°C
LT1056
Warmed Up LT1055
T_A = 70°C
LT1056
V_O = ±10V, R_L = 2k
V_Cm = ±10.5V
V_S = ±10V to ±18V
R_L = 2k
LT1055AC
LT1056AC
MIN TYP MAX
q—
q—
q—
q—
100 330
100 360
—
—
—
—
q—
1.2
4.0
q—
—
—
q—
10
50
q—
14
70
q—
q—
±30 ±150
±40 ±80
q 80 250 —
q 85 100 —
q 89 105 —
q ±12 ±13.1 —
LT1055CH/LT1056CH
LT1055CN8/LT1056CN8
MIN TYP MAX
—
140 750
—
140 800
—
250 1250
—
280 1350
—
1.6 8.0
—
3.0 12.0
—
16
80
—
18 100
—
±40 ±200
—
±50 ±240
60
250 —
82
98
—
87
103 —
±12 ±13.1 —
UNITS
µV
µV
µV
µV
µV/°C
µV/°C
pA
pA
pA
pA
V/mV
dB
dB
V
V_S = ±15V, V_CM = 0V, –55°C ≤ T_A ≤ 125°C unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
V_OS
Input Offset Voltage (Note1)
LT1055
q
LT1056
q
Average Temperature
(Note 5)
q
Coefficient of Input Offset
Voltage
I_OS
Input Offset Current
Warmed Up LT1055
q
T_A = 125°C LT1056
q
I_B
Input Bias Current
Warmed Up LT1055
q
T_A = 125°C LT1056
q
A_VOL
Large-Signal Voltage Gain
V_O = ±10V, R_L = 2k
q
CMRR Common-Mode Rejection Ratio V_CM = ±10.5V
q
PSRR Power Supply Rejection Ratio V_S = ±10V to ±17V
q
V_OUT
Output Voltage Swing
R_L = 2k
q
LT1055AM
LT1056AM
MIN TYP MAX
— 180 500
— 180 550
—
1.3
4.0
— 0.20 1.2
— 0.25 1.5
— ±0.4 ±2.5
— ±0.5 ±3.0
40 120 —
85 100 —
88 104 —
±12 ±12.9 —
LT1055M
LT1056M
MIN TYP MAX
—
250 1200
—
250 1250
—
1.8 8.0
—
0.25 1.8
—
0.30 2.4
—
±0.5 ±4.0
—
±0.6 ±5.0
35
120 —
82
98
—
86
102 —
±12 ±12.9 —
UNITS
µV
µV
µV/°C
nA
nA
nA
nA
V/mV
dB
dB
V
The q denotes specifications which apply over the full operating
temperature range.
For MIL-STD components, please refer to LTC883 data sheet for test
listing and parameters.
Note 1: Offset voltage is measured under two different conditions:
(a) approximately 0.5 seconds after application of power; (b) at T_A = 25°C
only, with the chip heated to approximately 38°C for the LT1055 and to
45°C for the LT1056, to account for chip temperature rise when the device
is fully warmed up.
Note 2: 10Hz noise voltage density is sample tested on every lot of A
grades. Devices 100% tested at 10Hz are available on request.
Note 3: This parameter is tested on a sample basis only.
Note 4: Current noise is calculated from the formula: i_n = (2ql_B)^1/2, where
q = 1.6 × 10^–19 coulomb. The noise of source resistors up to 1GΩ
swamps the contribution of current noise.
Note 5: Offset voltage drift with temperature is practically unchanged when
the offset voltage is trimmed to zero with a 100k potentiometer between
the balance terminals and the wiper tied to V⁺. Devices tested to tighter
drift specifications are available on request.
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