LTC3675_12 Datasheet, PDF (29/38 Pages) Linear Technology – 7-Channel Confi gurable High Power PMIC

LTC3675
APPLICATIONS INFORMATION
Table 13. LED Driver Regulator Program Register 1 Bit Format
Bit7
x
Unused
Bit6
Mode1
Mode1 = Mode0 = 0 is default; both LED pins are regulated.
Bit5
Mode0
Mode1 = 0 Mode0 = 1; Only LED1 is regulated. (Single string application).
Mode1 = 1 Mode0 = 0; LED driver is configured as a high voltage boost regulator.
Mode1 = Mode0 = 1; Both LED pins are regulated, but boost is not powered up. In this mode an external
voltage is needed to drive the LED’s.
Bit4
Slow Edge
This bit controls the slew rate of the switch node. Default is ‘0’ which enables the switch node to slew at a
faster rate than if the bit were programmed a ‘1.’
Bit3
2xFS
This bit doubles the full-scale programmed LED current. Default is ‘1.’
Bit2(GRAD2)
Bit1(GRAD1)
Bit0(GRAD0)
DAC Control
LED current gradation timing bits. Default is ‘111.’ See Table 14.
These times are shown in Table 14. The default state of
000 in GRAD[2:0] results in a very fast ramp time that
cannot be visually perceived.
Table 14. LED Gradation Bits
GRAD2, GRAD1, GRAD0
GRADATION STEP TIME
000
0.056 ms
001
0.912 ms
010
1.824 ms
011
3.648 ms
100
7.296 ms
101
14.592 ms
110
29.184 ms
111 (Default)
58.368 ms
The LED DAC register is at sub-address 08h. All 8 bits in
this register are used to control LED current. The default
state of this register is 00h which disables the LED driver.
See Table 1.
Operating the LED Driver As a High Voltage Boost
Regulator
The LED driver may be configured as a high voltage boost
regulator capable of producing an output voltage up to
40V. The boost mode may be programmed via I²C. In
this mode, the LED_OV pin serves as the feedback pin.
The feedback resistors are selected as discussed in the
Switching Regulator Output voltage and Feedback Network
section. The LED_FS pins must be tied to the input supply
in this mode. When configured as a high voltage boost,
the LED DAC register is ignored.
To maintain stability, the average inductor current must
be maintained below 750mA. This limits the deliverable
output current at low input supply voltages. Figure 8 gives
an example of the LED driver configured as a high voltage
boost regulator.
Input and Output Decoupling Capacitor Selection
The LTC3675 has multiple input supply pins and output
pins. Each of these pins must be decoupled with low ESR
capacitors to GND. These capacitors must be placed as
close to the pins as possible. Ceramic dielectric capacitors
are a good compromise between high dielectric constant
and stability versus temperature and DC bias. Note that the
capacitance of a capacitor deteriorates at higher DC bias.
It is important to consult manufacturer data sheets and
obtain the true capacitance of a capacitor at the DC bias
voltage it will be operated at. For this reason, avoid the
use of Y5V dielectric capacitors. The X5R/X7R dielectric
capacitors offer good overall performance.
The input supply voltage pins 6, 7, 10 and 40 all need
to be decoupled with at least 10μF capacitors. The input
supply pins 31 and 34 and the DVCC pin 41 need to be
decoupled with 2.2μF capacitors. The outputs of the 1A
buck regulators need 22μF capacitors, while the outputs
of the 500mA buck regulators need 10μF capacitors. The
buck-boost output regulator needs a 22μF decoupling
capacitor. The boost regulator needs two 22μF output
decoupling capacitors. The LED driver output pin should
be decoupled with a 4.7μF capacitor.
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